Calibrating a predictive cache emulator for SoC design. - Stéphane Mancini; Lionel Pierrefeu; Zahir Larabi; Yves Mathieu (AHS, 2010)

Exploration of 3D grid caching strategies for ray-shooting. - Stéphane Mancini; Zahir Larabi; Yves Mathieu; Tomasz Toczek; Lionel Pierrefeu (J. Real Time Image Process., 2012)

A 0.021mm2 PVT-Aware Digital-Flow-Compatible Adaptive Back-Biasing Regulator with Scalable Drivers Achieving 450% Frequency Boosting and 30% Power Reduction in 22nm FDSOI Technology. - Yasser Moursy; Thiago Raupp da Rosa; Lionel Jure; Anthony Quelen; Sébastien Genevey; Lionel Pierrefeu; Emmanuel G. Collins Jr.; Joerg Winkler; Jonathan Park; Gaël Pillonnet; Vincent Huard; Andrea Bonzo; et al. (ISSCC, 2021)