A Quantization Noise Reduction Method for Delta-Sigma Fractional-N PLLs Using Cascaded Injection-Locked Oscillators. - Liqun Feng; Woogeun Rhee; Zhihua Wang 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A Low-Voltage Bias-Current-Free Pseudo-Differential Hybrid PLL Using a Time-Interleaving Flip-Flop Phase Detector. - Liqun Feng; Qianxian Liao; Woogeun Rhee; Zhihua Wang 001 (A-SSCC, 2023)

A 2.6GHz ΔΣ Fractional-N Bang-Bang PLL with FIR-Embedded Injection-Locking Phase-Domain Low-Pass Filter. - Liqun Feng; Woogeun Rhee; Zhihua Wang 001 (CICC, 2023)

A 0.6V Fully-Integrated BLE Transmitter in 65nm CMOS Using a Common-Mode-Ripple-Cancelled Hybrid PLL and a Duty-Cycle-Controlled Class-E/F2 PA Achieving 25% System Efficiency at 0dBm. - Liqun Feng; Qianxian Liao; Longhao Kuang; Jiahao Zhao; Woogeun Rhee; Zhihua Wang (A-SSCC, 2024)

14.7 A 0.45V 0.72mW 2.4GHz Bias-Current-Free Fractional-N Hybrid PLL Using a Voltage-Mode Phase Interpolator in 28nm CMOS. - Liqun Feng; Xuansheng Ji; Longhao Kuang; Qianxian Liao; Su Han; Jiahao Zhao; Woogeun Rhee; Zhihua Wang 001 (ISSCC, 2024)

A DTC-Free Fractional-N BBPLL With FIR-Embedded Injection-Locked-Oscillator-Based Phase-Domain Lowpass Filter. - Liqun Feng; Woogeun Rhee; Zhihua Wang 001 (IEEE J. Solid State Circuits, 2024)

A 0.5V 0.55mm2 Bias-Current-Free BLE Transceiver with 1-Bit Delay-Based Demodulation for Energy-Harvesting IoT applications. - Liqun Feng; Xuansheng Ji; Qianxian Liao; Longhao Kuang; Yunzhao Nie; Jiahao Zhao; Woogeun Rhee; Zhihua Wang 001 (CICC, 2025)

Analysis and Design of Bias-Current-Free Hybrid Phase-Locked Loops with Multi-Phase Time-Interleaved Phase Detector. - Qibang Sun; Liqun Feng; Woogeun Rhee; Zhihua Wang (ISCAS, 2025)

An Ultra-Low-Voltage Bias-Current-Free Fractional-N Hybrid PLL With Voltage-Mode Phase Detection and Interpolation. - Liqun Feng; Xuansheng Ji; Longhao Kuang; Qianxian Liao; Su Han; Jiahao Zhao; Woogeun Rhee; Zhihua Wang 001 (IEEE J. Solid State Circuits, 2025)