RACER: Bit-Pipelined Processing Using Resistive Memory. - Minh S. Q. Truong; Eric Chen; Deanyone Su; Liting Shen; Alexander Glass; L. Richard Carley; James A. Bain; Saugata Ghose (MICRO, 2021)

Adapting the RACER Architecture to Integrate Improved In-ReRAM Logic Primitives. - Minh S. Q. Truong; Liting Shen; Alexander Glass; Alison Hoffmann; L. Richard Carley; James A. Bain; Saugata Ghose (IEEE J. Emerg. Sel. Topics Circuits Syst., 2022)