180nm 4Mb High Speed High Reliability Embedded SONOS Flash Memory. - Liyang Pan; Dong Wu; Guangjun Yang; Lei Sun; Huiqing Pang; Jun Zhu (CICC, 2006)

Pure logic CMOS based embedded Non-Volatile Random Access Memory for low power RFID application. - Liyang Pan; Xian Luo; Yaru Yan; Jirong Ma; Dong Wu; Jun Xu (CICC, 2008)

Embedded high-speed BCH decoder for new-generation NOR flash memories. - Xueqiang Wang; Dong Wu; Chaohong Hu; Liyang Pan; Runde Zhou (CICC, 2009)

A High-Speed Two-Cell BCH Decoder for Error Correcting in MLC nor Flash Memories. - Xueqiang Wang; Liyang Pan; Dong Wu; Chaohong Hu; Runde Zhou (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

A novel high-speed and low-power negative voltage level shifter for low voltage applications. - Peijun Liu; Xueqiang Wang; Dong Wu; Zhigang Zhang; Liyang Pan (ISCAS, 2010)

A chip-level path-delay-distribution based Dual-VDD method for low power FPGA (abstract only). - Jianfeng Zhu 001; Dong Wu; Yaru Yan; Xiao Yu; Hu He 001; Liyang Pan (FPGA, 2011)

A cost-efficient self-configurable BIST technique for testing multiplexer-based FPGA interconnect. - Jianfeng Zhu 001; Hu He 001; Dong Wu; Liyang Pan (J. Electron. Test., 2011)

Erratum to: A Cost-Efficient Self-Configurable BIST Technique for Testing Multiplexer-Based FPGA Interconnect. - Jianfeng Zhu 001; Hu He 001; Dong Wu; Liyang Pan (J. Electron. Test., 2011)

An ultra-low-power extended counting ADC For large scale sensor arrays. - Cencen Gao; Dong Wu; Hui Liu; Nan Xie; Liyang Pan (ISCAS, 2014)

Total ionizing radiation effects of 2-T SONOS for 130 nm/4 Mb NOR flash memory technology. - Fengying Qiao; Liyang Pan; Xiao Yu; Haozhi Ma; Dong Wu; Jun Xu (Sci. China Inf. Sci., 2014)

Assessment methodology of the lateral migration component in data retention of 3D SONOS memories. - Lifang Liu; Antonio Arreghini; Geert Van den Bosch; Liyang Pan; Jan Van Houdt (Microelectron. Reliab., 2014)

A Fast Application-Based Supply Voltage Optimization Method for Dual Voltage FPGA. - Jianfeng Zhu 001; Liyang Pan; Yaru Yan; Dong Wu; Hu He 001 (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Air-gap/SiO2 liner TSVs with improved electrical performance. - Cui Huang; Dong Wu; Liyang Pan; Zheyao Wang (3DIC, 2015)

Data pre-emphasis based retention reliability enhance scheme for MLC NAND Flash memories. - Haozhi Ma; Zhongyi Gao; Liyang Pan; Jun Xu (ASICON, 2015)

Software Hardware Co-design for Side-Channel Analysis Platform on Security Chips. - Qian Lei; Liji Wu; Shaohui Zhang; Xiangmin Zhang; Xiangyu Li 002; Liyang Pan; Zhimeng Dong (CIS, 2015)

Synaptic learning behaviors achieved by metal ion migration in a Cu/PEDOT: PSS/Ta memristor. - Wenqiang Luo; Fang-Yuan Yuan; Huaqiang Wu; Liyang Pan; Ning Deng 008; Fei Zeng; Rongshan Wei; Xuanjing Cai (NVMTS, 2015)

A 1G-cell floating-gate NOR flash memory in 65 nm technology with 100 ns random access time. - Lifang Liu; Dong Wu; Xuemei Liu; Zongliang Huo; Ming Liu; Liyang Pan (Sci. China Inf. Sci., 2015)

Fabrication of ultra-thin silicon chips using thermally decomposable temporary bonding adhesive. - Xingjun Xue; Shujie Yang; Dong Wu; Liyang Pan; Zheyao Wang (IEEE SENSORS, 2016)

LSB page refresh based retention error recovery scheme for MLC NAND Flash. - Haozhi Ma; Lifang Liu; Liyang Pan; Jun Xu (Sci. China Inf. Sci., 2016)

OCStore: Accelerating Distributed Object Storage with Open-Channel SSDs. - Youyou Lu; Jiacheng Zhang; Zhe Yang 012; Liyang Pan; Jiwu Shu (ICDCS, 2019)

An Energy-Efficient Gain-Cell Embedded DRAM Design with Weight Encoding for CNN Applications. - Tao Huang; Run Run; Yi Hu; Li Yin; Liyang Pan; Guolin Li; Xiang Xie (ICTA, 2023)

ANP-I: A 28nm 1.5pJ/SOP Asynchronous Spiking Neural Network Processor Enabling Sub-O.1 μJ/Sample On-Chip Learning for Edge-AI Applications. - Jilin Zhang; Dexuan Huo; Jian Zhang 020; Chunqi Qian; Qi Liu 010; Liyang Pan; Zhihua Wang 001; Ning Qiao; Kea-Tiong Tang; Hong Chen 002 (ISSCC, 2023)

An Error-Free 64KB ReRAM-Based nvSRAM Integrated to a Microcontroller Unit Supporting Real-Time Program Storage and Restoration. - Hanwen Gong; Hu He 001; Liyang Pan; Bin Gao 006; Jianshi Tang; Sining Pan; Jianing Li; Peng Yao; Dabin Wu; He Qian; Huaqiang Wu (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

A Dual-Gate Vertical Channel IGZO Transistor for BEOL Stackable 3D Parallel Integration for Memory and Computing Applications. - Ziyi Liu; Yiwei Du; Renrong Liang; Zhigang Zhang; Liyang Pan; Jianshi Tang; Renrong Liang; Bin Gao 006; Qi Hu; Jun Xu; He Qian; Huaqiang Wu; et al. (VLSI Technology and Circuits, 2024)

ANP-I: A 28-nm 1.5-pJ/SOP Asynchronous Spiking Neural Network Processor Enabling Sub-0.1-μ J/Sample On-Chip Learning for Edge-AI Applications. - Jilin Zhang; Dexuan Huo; Jian Zhang 020; Chunqi Qian; Qi Liu 010; Liyang Pan; Zhihua Wang 001; Ning Qiao; Kea-Tiong Tang; Hong Chen 002 (IEEE J. Solid State Circuits, 2024)