A 1.25 GHz 0.35 μm monolithic CMOS PLL clock generator for data communications. - Lizhong Sun; Tad A. Kwasniewski (CICC, 1999)

A quadrature output voltage controlled ring oscillator based on three-stage sub-feedback loops. - Lizhong Sun; Tad A. Kwasniewski; Kris Iniewski (ISCAS (2), 1999)

Reduced complexity, high performance digital delta-sigma modulator for fractional-N frequency synthesis. - Lizhong Sun; Thierry Lepley; Franck Nozahic; Amaud Bellissant; Tad A. Kwasniewski; Bany Heim (ISCAS (2), 1999)

A 1.0 V GHz range 0.13 μm CMOS frequency synthesizer. - Lizhong Sun; Dale Nelson (CICC, 2001)

A 1.25-GHz 0.35-μm monolithic CMOS PLL based on a multiphase ring oscillator. - Lizhong Sun; Tadeusz Kwasniewski (IEEE J. Solid State Circuits, 2001)

A Fractional-N PLL for SONET-Quality Clock-Syntlhesis Applicationis. - Axel Thomsen; Ligang Zhang; Doug Frey; Q. Yu; Lizhong Sun; Akhil K. Garlapati; R. Hulfachor; Douglas F. Pastorello; Richard J. Juhn (ISSCC, 2007)

Compact modeling of microbatteries using behavioral linearization and model-order reduction. - Mohammed Shemsu Nesro; Lizhong Sun; Ibrahim M. Elfadel (ASP-DAC, 2015)