Fault Modeling and Test Algorithm Development. - Frans P. M. Beenker; Rob Dekker; Loek Thijssen (ITC, 1988)

A Realistic Self-Test Machine for Static Random Access Memories. - Frans P. M. Beenker; Rob Dekker; Loek Thijssen (ITC, 1988)

Realistic built-in self-test for static RAMs. - Rob Dekker; Frans P. M. Beenker; Loek Thijssen (IEEE Des. Test, 1989)

Functional and IDDQ testing on a static RAM. - R. Meershoek; Bas Verhelst; Rory McInerney; Loek Thijssen (ITC, 1990)

A realistic fault model and test algorithms for static random access memories. - Rob Dekker; Frans P. M. Beenker; Loek Thijssen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990)

Minimizing Test Time by Exploiting Parallelism in Macro Test. - Hans Bouwmeester; Steven Oostdijk; Frank Bouwman; Rudi Stans; Loek Thijssen; Frans P. M. Beenker (ITC, 1993)