A Structural Study and Hyperedge Clustering Technique for Large Scale Circuits. - Logan M. Rakai; Jianhua Li; Laleh Behjat; Jie Huang (SiPS, 2006)

Clustering algorithms for circuit partitioning and placement problems. - Jianhua Li; Laleh Behjat; Logan Rakai (ECCTD, 2007)

Two Clustering Preprocessing Techniques for Large-Scale Circuits. - Laleh Behjat; Jianhua Li; Logan M. Rakai; Jie Huang (ISCAS, 2007)

A pre-placement net length estimation technique for mixed-size circuits. - Bahareh Fathi; Laleh Behjat; Logan M. Rakai (SLIP, 2009)

A Multilevel Congestion-Based Global Router. - Logan M. Rakai; Laleh Behjat; Shawki Areibi; Tamás Terlaky (VLSI Design, 2009)

Wirelength and congestion estimation for routability-driven placement. - Yang-Yang Li; Logan M. Rakai; Laleh Behjat; Bill Swartz (SLIP, 2011)

A pre-placement individual net length estimation model and an application for modern circuits. - Amin Farshidi; Laleh Behjat; Logan M. Rakai; Bahareh Fathi (Integr., 2011)

Parallel clock tree synthesis. - Logan M. Rakai; Laleh Behjat (CCECE, 2012)

An algebraic multigrid-based algorithm for circuit clustering. - Logan M. Rakai; Laleh Behjat; Sebastian Martin; Jose Aguado (Appl. Math. Comput., 2012)

A New Length-Based Algebraic Multigrid Clustering Algorithm. - Logan M. Rakai; Amin Farshidi; Laleh Behjat; David T. Westwick (VLSI Design, 2012)

Methods for Solving Modern, Scale-Borne Problems in VLSI Physical Design. - Logan Rakai (2012)

A self-tuning multi-objective optimization framework for geometric programming with gate sizing applications. - Amin Farshidi; Logan M. Rakai; Laleh Behjat; David T. Westwick (ACM Great Lakes Symposium on VLSI, 2013)

Buffer sizing for clock networks using robust geometric programming considering variations in buffer sizes. - Logan M. Rakai; Amin Farshidi; Laleh Behjat; David T. Westwick (ISPD, 2013)

A new a priori net length estimation technique for integrated circuits using radial basis functions. - Amin Farshidi; Logan M. Rakai; Bardia Samimi; Laleh Behjat; David T. Westwick (Comput. Electr. Eng., 2013)

GPU-Accelerated Solutions to Optimal Power Flow Problems. - Logan M. Rakai; William D. Rosehart (HICSS, 2014)

Optimal gate sizing using a self-tuning multi-objective framework. - Amin Farshidi; Logan M. Rakai; Laleh Behjat; David T. Westwick (Integr., 2014)

Variation-Aware Geometric Programming Models for the Clock Network Buffer Sizing Problem. - Logan M. Rakai; Amin Farshidi; David T. Westwick; Laleh Behjat (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

Sizing Digital Circuits Using Convex Optimization Techniques. - Logan Rakai; Amin Farshidi (Computational Intelligence in Digital and Network Designs and Applications, 2015)

Minimizing Deployment Cost of Cloud-Based Web Application with Guaranteed QoS. - Seyedehmehrnaz Mireslami; Logan Rakai; Mea Wang; Behrouz Homayoun Far (GLOBECOM, 2015)

A Data-Driven Method to Detect the Abnormal Instances in an Electricity Market. - Payam Zamani Dehkordi; Logan Rakai; Hamidreza Zareipour (ICMLA, 2015)

A Detailed Routing-Aware Detailed Placement Technique. - Aysa Fakheri Tabrizi; Nima Karimpour Darav; Logan M. Rakai; Andrew A. Kennings; William Swartz; Laleh Behjat (ISVLSI, 2015)

Big Data Analytics for Modelling the Impact of Wind Power Generation on Competitive Electricity Market Prices. - Payam Zamani Dehkordi; Logan Rakai; Hamidreza Zareipour; William D. Rosehart (HICSS, 2016)

A fast force-directed simulated annealing for 3D IC partitioning. - Aysa Fakheri Tabrizi; Laleh Behjat; William Swartz; Logan M. Rakai (Integr., 2016)

A Parallel Method for the Computation of Matrix Exponential Based on Truncated Neumann Series. - Vassil S. Dimitrov; Viduneth Ariyarathna; Diego F. G. Coelho; Logan Rakai; Arjuna Madanayake; Renato J. Cintra (ARITH, 2017)

An efficient optimal clock network buffer sizing with slew consideration. - Ali Farshidi; Logan Rakai; Laleh Behjat (CCECE, 2017)

Detailed routing violation prediction during placement using machine learning. - Aysa Fakheri Tabrizi; Nima Karimpour Darav; Logan Rakai; Andrew A. Kennings; Laleh Behjat (VLSI-DAT, 2017)

A Multiobjective Cooptimization of Buffer and Wire Sizes in High-Performance Clock Trees. - Amin Farshidi; Laleh Behjat; Logan M. Rakai; David T. Westwick (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

Simultaneous Cost and QoS Optimization for Cloud Resource Allocation. - Seyedehmehrnaz Mireslami; Logan Rakai; Behrouz Homayoun Far; Mea Wang (IEEE Trans. Netw. Serv. Manag., 2017)

A machine learning framework to identify detailed routing short violations from a placed netlist. - Aysa Fakheri Tabrizi; Nima Karimpour Darav; Shuchang Xu; Logan Rakai; Ismail Bustany; Andrew A. Kennings; Laleh Behjat (DAC, 2018)

Efficient computation of tridiagonal matrices largest eigenvalue. - Diego F. G. Coelho; Vassil S. Dimitrov; Logan Rakai (J. Comput. Appl. Math., 2018)

Eh?Predictor: A Deep Learning Framework to Identify Detailed Routing Short Violations From a Placed Netlist. - Aysa Fakheri Tabrizi; Nima Karimpour Darav; Logan Rakai; Ismail Bustany; Andrew A. Kennings; Laleh Behjat (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Dynamic Cloud Resource Allocation Considering Demand Uncertainty. - Seyedehmehrnaz Mireslami; Logan Rakai; Mea Wang; Behrouz Homayoun Far (IEEE Trans. Cloud Comput., 2021)

SODA-Stream: SDN Optimization for Enhancing QoE in DASH Streaming. - Reza Hedayati Majdabadi; Mea Wang; Logan Rakai (NOMS, 2022)