An Untrimmed PVT-Robust 12-bit 1-MS/s SAR ADC IP in 55nm Deeply Depleted Channel CMOS Process. - Y. Zha; Loïc Zahnd; Jiang Deng; David Ruffieux; Komail M. H. Badami; T. Mavrogordatos; Y. Matsuo; Stéphane Emery (A-SSCC, 2019)

A 20 Channel EMG SoC with an Integrated 32b RISC Core for Real-Time Wireless Prosthetic Control. - Marc Pons Solé; Andre Bischof; Lorenzo Bergamini; Philippe Dallemagne; Stéphane Emery; Komail M. H. Badami; Jiang Deng; Themistoklis Mavrogordatos; Erfan Azarkhish; Loïc Zahnd; Costantino Cosentino; Marcin K. Augustyniak; et al. (ESSCIRC, 2019)

Energy-Autonomous MCU Operating in sub-VT Regime with Tightly-Integrated Energy-Harvester : A SoC for IoT smart nodes containing a MCU with minimum-energy point of 2.9pJ/cycle and a harvester with output power range from sub-µW to 4.32mW. - Jian Deng; Jean-Luc Nagel; Loïc Zahnd; Marc Pons 001; David Ruffieux; Claude Arm; Pascal Persechini; Stéphane Emery (ISLPED, 2019)