Power supply glitch induced faults on FPGA: An in-depth analysis of the injection mechanism. - Loïc Zussa; Jean-Max Dutertre; Jessy Clédière; Assia Tria (IOLTS, 2013)

Efficiency of a glitch detector against electromagnetic fault injection. - Loïc Zussa; Amine Dehbaoui; Karim Tobich; Jean-Max Dutertre; Philippe Maurine; Ludovic Guillaume-Sage; Jessy Clédière; Assia Tria (DATE, 2014)

Analysis of the fault injection mechanism related to negative and positive power supply glitches using an on-chip voltmeter. - Loïc Zussa; Jean-Max Dutertre; Jessy Clédière; Bruno Robisson (HOST, 2014)

Evidence of an information leakage between logically independent blocks. - Loïc Zussa; Ingrid Exurville; Jean-Max Dutertre; Jean-Baptiste Rigaud; Bruno Robisson; Assia Tria; Jessy Clédière (CS2@HiPEAC, 2015)

Resilient hardware Trojans detection based on path delay measurements. - Ingrid Exurville; Loïc Zussa; Jean-Baptiste Rigaud; Bruno Robisson (HOST, 2015)