A Review of Near-Memory Computing Architectures: Opportunities and Challenges. - Gagandeep Singh 002; Lorenzo Chelini; Stefano Corda; Ahsan Javed Awan; Sander Stuijk; Roel Jordans; Henk Corporaal; Albert-Jan Boonstra (DSD, 2018)

Coherently Attached Programmable Near-Memory Acceleration Platform and its application to Stencil Processing. - Jan van Lunteren; Ronald P. Luijten; Dionysios Diamantopoulos; Florian Auernhammer; Christoph Hagleitner; Lorenzo Chelini; Stefano Corda; Gagandeep Singh 002 (DATE, 2019)

Near-memory computing: Past, present, and future. - Gagandeep Singh 002; Lorenzo Chelini; Stefano Corda; Ahsan Javed Awan; Sander Stuijk; Roel Jordans; Henk Corporaal; Albert-Jan Boonstra (Microprocess. Microsystems, 2019)

Automatic Generation of Multi-Objective Polyhedral Compiler Transformations. - Lorenzo Chelini; Tobias Gysi; Tobias Grosser; Martin Kong; Henk Corporaal (PACT, 2020)

TDO-CIM: Transparent Detection and Offloading for Computation In-memory. - Kanishkan Vadivel; Lorenzo Chelini; Ali BanaGozar; Gagandeep Singh 002; Stefano Corda; Roel Jordans; Henk Corporaal (DATE, 2020)

PET-to-MLIR: A polyhedral front-end for MLIR. - Konrad Komisarczyk; Lorenzo Chelini; Kanishkan Vadivel; Roel Jordans; Henk Corporaal (DSD, 2020)

Declarative Loop Tactics for Domain-specific Optimization. - Lorenzo Chelini; Oleksandr Zinenko; Tobias Grosser; Henk Corporaal (ACM Trans. Archit. Code Optim., 2020)

Polygeist: Raising C to Polyhedral MLIR. - William S. Moses; Lorenzo Chelini; Ruizhe Zhao; Oleksandr Zinenko (PACT, 2021)

Progressive Raising in Multi-level IR. - Lorenzo Chelini; Andi Drebes; Oleksandr Zinenko; Albert Cohen 001; Nicolas Vasilache; Tobias Grosser; Henk Corporaal (CGO, 2021)

LoopOpt: Declarative Transformations Made Easy. - Lorenzo Chelini; Martin Kong; Tobias Grosser; Henk Corporaal (SCOPES, 2021)

MOM: Matrix Operations in MLIR. - Lorenzo Chelini; Henrik Barthels; Paolo Bientinesi; Marcin Copik; Tobias Grosser; Daniele G. Spampinato (CoRR, 2022)

OCC: An Automated End-to-End Machine Learning Optimizing Compiler for Computing-In-Memory. - Adam Siemieniuk; Lorenzo Chelini; Asif Ali Khan; Jerónimo Castrillón; Andi Drebes; Henk Corporaal; Tobias Grosser; Martin Kong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

CINM (Cinnamon): A Compilation Infrastructure for Heterogeneous Compute In-Memory and Compute Near-Memory Paradigms. - Asif Ali Khan; Hamid Farzaneh; Karl F. A. Friebel; Lorenzo Chelini; Jerónimo Castrillón (CoRR, 2023)

SEER: Super-Optimization Explorer for HLS using E-graph Rewriting with MLIR. - Jianyi Cheng; Samuel Coward; Lorenzo Chelini; Rafael Barbalho; Theo Drane (CoRR, 2023)

SEER: Super-Optimization Explorer for High-Level Synthesis using E-graph Rewriting. - Jianyi Cheng; Samuel Coward; Lorenzo Chelini; Rafael Barbalho; Theo Drane (ASPLOS (2), 2024)

CINM (Cinnamon): A Compilation Infrastructure for Heterogeneous Compute In-Memory and Compute Near-Memory Paradigms. - Asif Ali Khan; Hamid Farzaneh; Karl Friedrich Alexander Friebel; Clément Fournier; Lorenzo Chelini; Jerónimo Castrillón (ASPLOS (4), 2024)

Towards a high-performance AI compiler with upstream MLIR. - Renato Golin; Lorenzo Chelini; Adam Siemieniuk; Kavitha Madhu; Niranjan Hasabnis; Hans Pabst; Evangelos Georganas; Alexander Heinecke (CoRR, 2024)