Associative IC memories with relational search and nearest-match capabilities. - Sateh M. S. Jalaleddine; Louis G. Johnson (IEEE J. Solid State Circuits, 1992)

A 2×2 analog memory implemented with a special layout injector. - Yong-Yoong Chai; Louis G. Johnson (IEEE J. Solid State Circuits, 1996)

Reducing hardware requirement in FIR filter design. - Michael A. Soderstrand; Louis G. Johnson; Hary Arichanthiran; Mezbaul D. Hoque; Raja Elangovan (ICASSP, 2000)

Efficient pipelined tunable heterodyne notch filter implementation in FPGAs. - Asad Azam; Dhinesh Sasidaran; Karl E. Nelson; Gary E. Ford; Louis G. Johnson; Michael A. Soderstrand (ISCAS, 2000)

Public-domain Matlab program to generate highly optimized VHDL for FPGA implementation. - Kah-Howe Tan; Wen Fung-Leong; Sameer Kadam; Michael A. Soderstrand; Louis G. Johnson (ISCAS (4), 2001)

New complex-arithmetic heterodyne filter. - Grace Y. Cho; Louis G. Johnson; Michael A. Soderstrand (ISCAS (3), 2004)

Residue number system implementations of complex heterodyne tunable filters. - Grace Y. Cho; Louis G. Johnson; Michael A. Soderstrand (ISCAS (1), 2005)

Energy model of CMOS gates using a piecewise linear model. - Cheng C. Liu; Jian Chang; Louis G. Johnson (ISCAS, 2010)