Existence of Single-Event Double-Node Upsets (SEDU) in Radiation-Hardened Latches for Sub-65nm CMOS Technologies. - Sam M.-H. Hsiao; Lowry P.-T. Wang; Aaron C.-W. Liang; Charles H.-P. Wen (ITC, 2022)

Preventing Single-Event Double-Node Upsets by Engineering Change Order in Latch Designs. - Sam M.-H. Hsiao; Amy H.-Y. Tsai; Lowry P.-T. Wang; Aaron C.-W. Liang; Charles H.-P. Wen; Herming Chiueh (ITC, 2023)

LESER-2: Detailed Consideration in Latch Design under Process Migration for Prevention of Single-Event Double-Node Upsets. - Alan S.-M. Liu; Lowry P.-T. Wang; Charles H.-P. Wen; Herming Chiueh (ITC, 2024)

Temperature-Insensitive Soft-Error-Tolerant Flip-Flop Design For Automotive Electronics. - Ralf E.-H. Yee; Nicholas Y.-J. Su; Lowry P.-T. Wang; Charles H.-P. Wen; Herming Chiueh (VTS, 2024)

Designing Radiation-Hardened D Flip-Flop with Reduced Latency and Area Using Filtering Buffer. - Nelson M.-C. Wu; Lowry P.-T. Wang; Chia-Wei Liang; Charles H.-P. Wen; Herming Chiueh (VTS, 2025)