Luc Claesen

According to our database, Luc Claesen authored at least 90 papers between 1985 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Feature Correlation Transformer for Estimating Ambiguous Optical Flow.

Guibiao Fang, Junhong Chen, Dayong Liang, Muhammad Asim, Frank Van Reeth, Luc Claesen, Zhenguo Yang, Wenyin Liu

Neural Process. Lett., December, 2023

Structured Dynamic Precision for Deep Neural Networks Quantization.

Kai Huang, Bowen Li, Dongliang Xiong, Haitian Jiang, Xiaowen Jiang, Xiaolang Yan, Luc Claesen, Dehong Liu, Junjian Chen, Zhili Liu

ACM Trans. Design Autom. Electr. Syst., January, 2023

Structured Term Pruning for Computational Efficient Neural Networks Inference.

Kai Huang, Bowen Li, Siang Chen, Luc Claesen, Wei Xi, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong, Xiaolang Yan

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023

2022

ClueDepth Grasp: Leveraging positional clues of depth for completing depth of transparent objects.

Yuanlin Hong, Junhong Chen, Yu Cheng, Yishi Han, Frank Van Reeth, Luc Claesen, Wenyin Liu

Frontiers Neurorobotics, September, 2022

Acceleration-Aware Fine-Grained Channel Pruning for Deep Neural Networks via Residual Gating.

Kai Huang, Siang Chen, Bowen Li, Luc Claesen, Hao Yao, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Structured precision skipping: Accelerating convolutional neural networks with budget-aware dynamic precision selection.

Kai Huang, Siang Chen, Bowen Li, Luc Claesen, Hao Yao, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong

J. Syst. Archit., 2022

Sample-wise dynamic precision quantization for neural network acceleration.

Bowen Li, Dongliang Xiong, Kai Huang, Xiaowen Jiang, Hao Yao, Junjian Chen, Luc Claesen

IEICE Electron. Express, 2022

2021

DPOQ: Dynamic Precision Onion Quantization.

Bowen Li, Kai Huang, Siang Chen, Dongliang Xiong, Luc Claesen

Proceedings of the Asian Conference on Machine Learning, 2021

2020

A novel feature representation: Aggregating convolution kernels for image retrieval.

Qi Wang, Jinxing Lai, Luc Claesen, Zhenguo Yang, Liang Lei, Wenyin Liu

Neural Networks, 2020

Fast Incremental Least Square Pose Estimation for Hardware Implementation with Rolling Shutter Camera.

Aydin Emre Güzel, Dilara Hisar, Luc Claesen, H. Fatih Ugurdag

Proceedings of the 28th Signal Processing and Communications Applications Conference, 2020

Fine-Grained Channel Pruning for Deep Residual Neural Networks.

Siang Chen, Kai Huang, Dongliang Xiong, Bowen Li, Luc Claesen

Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2020, 2020

Adaptive Hybrid Composition Based Super-Resolution Network via Fine-Grained Channel Pruning.

Siang Chen, Kai Huang, Bowen Li, Dongliang Xiong, Haitian Jiang, Luc Claesen

Proceedings of the Computer Vision - ECCV 2020 Workshops, 2020

DFQF: Data Free Quantization-aware Fine-tuning.

Bowen Li, Kai Huang, Siang Chen, Dongliang Xiong, Haitian Jiang, Luc Claesen

Proceedings of The 12th Asian Conference on Machine Learning, 2020

2019

A Real-Time High-Quality Complete System for Depth Image-Based Rendering on FPGA.

Yanzhe Li, Luc Claesen, Kai Huang, Menglian Zhao

IEEE Trans. Circuits Syst. Video Technol., 2019

2018

Analysis of Collision Detection Using Implicit Sphere Tree in Saptic Interaction Environments for Maxillofacial Surgery Applications.

Laurens Le Jeune, Wout Swinkels, Yi Sun, Constantinus Politis, Luc Claesen

Proceedings of the 11th International Congress on Image and Signal Processing, 2018

PoseLab: A Levenberg-Marquardt Based Prototyping Environment for Camera Pose Estimation.

Michiel Darcis, Wout Swinkels, Aydin Emre Guzel, Luc Claesen

Proceedings of the 11th International Congress on Image and Signal Processing, 2018

2017

High-quality view interpolation based on depth maps and its hardware implementation.

Yanzhe Li, Kai Huang, Luc Claesen

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

SVM point-based real-time emotion detection.

Wout Swinkels, Luc Claesen, Feng Xiao, Haibin Shen

Proceedings of the IEEE Conference on Dependable and Secure Computing, 2017

Real-time SVM-based emotion recognition algorithm.

Wout Swinkels, Luc Claesen, Feng Xiao, Haibin Shen

Proceedings of the 10th International Congress on Image and Signal Processing, 2017

Haptic collision detection on highly complex medical data structures.

Niels Pirotte, Casper Vranken, Wout Swinkels, Luc Claesen, Yi Sun, Constantinus Politis

Proceedings of the 10th International Congress on Image and Signal Processing, 2017

Automated winston-lutz test for efficient quality control in stereotactic radiosurgery.

Michiel Darcis, Gert Leurs, Kenny Geens, Alexandra Jankelevitch, Wout Swinkels, Luc Claesen

Proceedings of the 10th International Congress on Image and Signal Processing, 2017

CT-based automatic identification and localization of the right phrenic nerve.

Kobe Bamps, Celine Cuypers, Luc Claesen, Pieter Koopman

Proceedings of the 10th International Congress on Image and Signal Processing, 2017

2016

A Novel Hardware-Oriented Stereo Matching Algorithm and Its Architecture Design in FPGA.

Yanzhe Li, Kai Huang, Luc Claesen

Proceedings of the VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability, 2016

SoC oriented real-time high-quality stereo vision system.

Yanzhe Li, Kai Huang, Luc Claesen

Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

Line buffer reduction for LUT-based real-time image inverse warping.

Yufeng Lu, Xiaohua Luo, Yimu Wang, Luc Claesen

Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

Poster: A Software-Defined Multi-Camera Network.

Po-Yen Chen, Chien Chen, Parthiban Selvaraj, Luc Claesen

Proceedings of the 14th Annual International Conference on Mobile Systems, 2016

SoC and FPGA oriented high-quality stereo vision system.

Yanzhe Li, Kai Huang, Luc Claesen

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

2015

Cloud-based orthognathic surgical planning platform.

Wout Swinkels, Yi Sun, Bart Stukken, Constantinus Politis, Luc Claesen

Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

Quantitative comparison of lossless video compression for multi-camera stereo and view interpolation applications.

Yu Bao, Bart Stukken, Jef Stals, Caikou Chen, Luc Claesen

Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

Comparison of Predictive-Corrective Video Coding Filters for Real-Time FPGA-based Lossless Compression in Multi-Camera Systems.

Bart Stukken, Yimu Wang, Yu Bao, Caikou Chen, Luc Claesen

Proceedings of the 12th FPGAworld Conference 2015, 2015

2014

SoC processor for real-time object labeling in life camera streams with low line level latency.

Zhengqiang Yu, Luc Claesen, Yun Pan, Andy Motten, Yimu Wang, Xiaolang Yan

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A spatiotemporal dithering method to extend color depth in multi-display system.

Yimu Wang, Luc Claesen

Proceedings of the 2nd International Conference on Systems and Informatics, 2014

2013

A Fast Self-Organizing Map Algorithm for Handwritten Digit Recognition.

Yimu Wang, Alexander Peyls, Yun Pan, Luc Claesen, Xiaolang Yan

Proceedings of the Multimedia and Ubiquitous Engineering, 2013

2012

Trinocular Stereo Vision Using a Multi Level Hierarchical Classification Structure.

Andy Motten, Luc Claesen, Yun Pan

Proceedings of the VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design, 2012

Trinocular disparity processor using a hierarchic classification structure.

Andy Motten, Luc Claesen, Yun Pan

Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012

Adaptive memory architecture for real-time image warping.

Andy Motten, Luc Claesen, Yun Pan

Proceedings of the 30th International IEEE Conference on Computer Design, 2012

2011

Binary confidence evaluation for a stereo vision based depth field processor SoC.

Andy Motten, Luc Claesen, Yun Pan

Proceedings of the First Asian Conference on Pattern Recognition, 2011

2010

A binary adaptable window SoC architecture for a stereo vision based depth field processor.

Andy Motten, Luc Claesen

Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

Smart camera SoC system for interactive real-time real-brush based digital painting systems.

Luc Claesen, Peter Vandoren, Tom Van Laerhoven, Andy Motten, Domien Nowicki, Tom De Weyer, Frank Van Reeth, Eddy Flerackers

Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

Smart Camera System-on-Chip Architecture for Real-Time Brush Based Interactive Painting Systems.

Luc Claesen, Peter Vandoren, Tom Van Laerhoven, Andy Motten, Fabian Di Fiore, Frank Van Reeth, Jing Liao, Jinhui Yu

Proceedings of the VLSI-SoC: Forward-Looking Trends in IC and Systems Design, 2010

SoC architecture for real-time interactive painting based on lattice-Boltzmann.

Domien Nowicki, Luc Claesen

Proceedings of the 17th IEEE International Conference on Electronics, 2010

An on-chip parallel memory architecture for a stereo vision system.

Andy Motten, Luc Claesen

Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009

FluidPaint: an interactive digital painting system using real wet brushes.

Peter Vandoren, Luc Claesen, Tom Van Laerhoven, Johannes Taelman, Chris Raymaekers, Eddy Flerackers, Frank Van Reeth

Proceedings of the ACM International Conference on Interactive Tabletops and Surfaces, 2009

2008

IntuPaint: Bridging the gap between physical and digital painting.

Peter Vandoren, Tom Van Laerhoven, Luc Claesen, Johannes Taelman, Chris Raymaekers, Frank Van Reeth

Proceedings of the Third IEEE International Workshop on Tabletops and Interactive Surfaces (Tabletop 2008), 2008

Dip - it: digital infrared painting on an interactive table.

Peter Vandoren, Tom Van Laerhoven, Luc Claesen, Johannes Taelman, Fabian Di Fiore, Frank Van Reeth, Eddy Flerackers

Proceedings of the Extended Abstracts Proceedings of the 2008 Conference on Human Factors in Computing Systems, 2008

1999

Symbolic Multi-Level Verification of Refinement.

Stefan Hendricx, Luc J. M. Claesen

Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

Formally Verified Redundancy Removal.

Stefan Hendricx, Luc J. M. Claesen

Proceedings of the 1999 Design, 1999

Verification of Finite-State-Machine Refinements Using a Symbolic Methodology.

Stefan Hendricx, Luc J. M. Claesen

Proceedings of the Correct Hardware Design and Verification Methods, 1999

1998

Incorporating local consistency information into the online signature verification process.

Ronny Martens, Luc J. M. Claesen

Int. J. Document Anal. Recognit., 1998

1997

On-line Signature Verification: Discrimination Emphasised.

Ronny Martens, Luc J. M. Claesen

Proceedings of the 4th International Conference Document Analysis and Recognition (ICDAR '97), 1997

Dynamic Programming Optimisation for On-line Signature Verificatio.

Ronny Martens, Luc J. M. Claesen

Proceedings of the 4th International Conference Document Analysis and Recognition (ICDAR '97), 1997

A symbolic core approach to the formal verification of integrated mixed-mode applications.

Stefan Hendricx, Luc J. M. Claesen

Proceedings of the European Design and Test Conference, 1997

An Evaluation of Different Handwriting Observation Techniques from a Signature Verification Point of View.

Ronny Martens, Luc J. M. Claesen

Proceedings of the Advances in Document Image Analysis, First Brazilian Symposium, 1997

1996

On-line signature verification by dynamic time-warping.

Ronny Martens, Luc J. M. Claesen

Proceedings of the 13th International Conference on Pattern Recognition, 1996

A formal verification technique for embedded software.

Olivier Thiry, Luc J. M. Claesen

Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996

1995

ED&TC 1995: Simulation versus formal verification.

Luc J. M. Claesen

IEEE Des. Test Comput., 1995

1994

A Proof of the Nonrestoring Division Algorithm and its Implementation on an ALU.

Diederik Verkest, Luc J. M. Claesen, Hugo De Man

Formal Methods Syst. Des., 1994

Modeling Multi-rate DSP Specification Semantics for Formal Transformational Design in HOL.

Catia M. Angelo, Luc J. M. Claesen, Hugo De Man

Formal Methods Syst. Des., 1994

Reasoning About a Class of Linear Systems of Equations in HOL.

Catia M. Angelo, Luc J. M. Claesen, Hugo De Man

Proceedings of the Higher Order Logic Theorem Proving and Its Applications, 1994

A Parallel Method for Functional Verification of Medium and High Throughput DSP Synthesis.

Mark Genoe, Luc J. M. Claesen, Hugo De Man

Proceedings of the Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1994

1993

On the Comparison of HOL and Boyer-Moore for Formal Hardware Verification.

Catia M. Angelo, Diederik Verkest, Luc J. M. Claesen, Hugo De Man

Formal Methods Syst. Des., 1993

Degrees of Formality in Shallow Embedding Hardware Description Languages in HOL.

Catia M. Angelo, Luc J. M. Claesen, Hugo De Man

Proceedings of the Higher Order Logic Theorem Proving and its Applications, 1993

Subterranean: A 600 Mbit/Sec Cryptographic VLSI Chip.

Luc J. M. Claesen, Joan Daemen, Mark Genoe, G. Peeters

Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993

An Architecture for Ray - Bezier Patch Intersection.

Peter De Vijt, Luc J. M. Claesen, Hugo De Man

Proceedings of the EGGH93: Eurographics Workshop on Graphics Hardware 1993, 1993

1992

The Formal Semantics Definition of a Multi-Rate DSP Specification Language in HOL.

Catia M. Angelo, Luc J. M. Claesen, Hugo De Man

Proceedings of the Higher Order Logic Theorem Proving and its Applications, 1992

A Description Methodology for Parameterized Modules in the Boyer-Moore Logic.

Diederik Verkest, J. Vandenbergh, Luc J. M. Claesen, Hugo De Man

Proceedings of the Theorem Provers in Circuit Design, 1992

A Proof of the Non-Restoring Division Algorithm and its Implementation on the Cathedral-II ALU.

Diederik Verkest, Luc J. M. Claesen, Hugo De Man

Proceedings of the Designing Correct Circuits, 1992

Performance Through Hierarchy in Static Timing Verification.

P. Johannes, Luc J. M. Claesen, Hugo De Man

Proceedings of the Algorithms, Software, Architecture, 1992

On the use of hierarchy in timing verification with statically sensitizable paths.

P. Johannes, Luc J. M. Claesen, Hugo De Man

Proceedings of the Second Great Lakes Symposium on VLSI, 1992

ASICs for a High Performance IVIulti Processor Systemfor Photo-realistic Image Synthesis.

Peter De Vijt, Luc J. M. Claesen, Hugo De Man

Proceedings of the EGGH92: Eurographics Workshop on Graphics Hardware 1992, 1992

1991

Defining Recursive Functions in HOL.

W. Ploegaerts, Luc J. M. Claesen, Hugo De Man

Proceedings of the 1991 International Workshop on the HOL Theorem Proving System and its Applications, 1991

Formal Hardware Verification in HOL and in Boyer-Moore: A Comparative Analysis.

Catia M. Angelo, Diederik Verkest, Luc J. M. Claesen, Hugo De Man

Proceedings of the 1991 International Workshop on the HOL Theorem Proving System and its Applications, 1991

Illustration of the SFG-Tracing Multi-Level Behavioral Verification Methodology, by the Correctness Proof of a High to Low Level Synthesis Application in CATHEDRAL-II.

Mark Genoe, Luc J. M. Claesen, Eric Verlind, Frank Proesmans, Hugo De Man

Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

1990

Acceleration of relaxation-based circuit simulation using a multiprocessor system.

Patrick Odent, Luc J. M. Claesen, Hugo De Man

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990

Timing verification using statically sensitizable paths.

Jacques Benkoski, E. Vanden Meersch, Luc J. M. Claesen, Hugo De Man

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990

Derivation of signal flow direction in MOS VLSI: an alternative.

W. De Rammelaere, Ivo Bolsens, Luc J. M. Claesen, Hugo De Man

Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990

Correctness proofs of parameterized hardware modules in the CATHEDRAL-II synthesis environment.

Diederik Verkest, Luc J. M. Claesen, Hugo De Man

Proceedings of the European Design Automation Conference, 1990

SPI: an open interface integrating highly interactive electronic CAD tools.

J. P. Schupp, Johan Cockx, Luc J. M. Claesen, Hugo De Man

Proceedings of the European Design Automation Conference, 1990

A combined waveform relaxation: waveform relaxation newton algorithm for efficient parallel circuit simulation.

Patrick Odent, Luc J. M. Claesen, Hugo De Man

Proceedings of the European Design Automation Conference, 1990

SLOCOP-II: a versatile timing verification system for MOSVLSI.

P. Johannes, P. Das, Luc J. M. Claesen, Hugo De Man

Proceedings of the European Design Automation Conference, 1990

1989

Description and verification of more-dimensional regular and non-homogeneous structures using a functional hardware description language.

W. Ploegaerts, Diederik Verkest, Luc Claesen, Hugo De Man

Microprocessing and Microprogramming, 1989

Application of system semantics to VLSI for the transformational design of a parameterized booth multiplier module - a case study.

Luc Claesen, R. T. Boute, J. De Man, W. Ploegaerts, M. Seutter, J. Vanslembrouck, Diederik Verkest

Microprocessing and Microprogramming, 1989

Efficient false path elimination algorithms for timing verification by event graph preprocessing.

Luc J. M. Claesen, J. P. Schupp, P. Das, P. Johannes, S. Perremans, Hugo De Man

Integr., 1989

Correctness verification of VLSI modules supported by a very efficient Boolean prover.

P. Lammens, Luc J. M. Claesen, Hugo De Man

Proceedings of the Computer Design: VLSI in Computers and Processors, 1989

Static Timing Analysis of Dynamically Sensitizable Paths.

S. Perremans, Luc J. M. Claesen, Hugo De Man

Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

Feedback Loops and Large Subcircuits in the Multiprocessor Implementation of a Relaxation Based Circuit Simulator.

Patrick Odent, Luc J. M. Claesen, Hugo De Man

Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

Electrical Debugging of Synchronous MOS VLSI Circuits Exploiting Analysis of the Intended Logic Behaviour.

Ivo Bolsens, W. De Rammelaere, Luc J. M. Claesen, Hugo De Man

Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

1986

Cathedral-II: A Silicon Compiler for Digital Signal Processing.

Hugo De Man, Jan M. Rabaey, Paul Six, Luc J. M. Claesen

IEEE Des. Test, 1986

An intelligent module generator environment.

Paul Six, Luc J. M. Claesen, Jan M. Rabaey, Hugo De Man

Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986

1985

CAD Tools for the optimized design of custom VLSI wave digital filters.

Rajeev Jain, Gert Goossens, Luc J. M. Claesen, Joos Vandewalle, Hugo De Man, L. Gazsi, Alfred Fettweis

Proceedings of the IEEE International Conference on Acoustics, 1985