A serial-input serial-output bit-sliced convolver. - Luigi Dadda; Luca Breveglieri (ICCD, 1988)

Design and implementation of a VLSI serial multiplier for fixed point numbers with self-checking capability. - Luca Breveglieri (Microprocess. Microprogramming, 1988)

Testing of serial input convolvers. - Luca Breveglieri; Luigi Dadda; Donatella Sciuto (Microprocessing and Microprogramming, 1990)

Deterministic Dequeue Automata and LL(1) Parsing of Breadth-Depth Grammars. - Luca Breveglieri; Claudio Citrini; Stefano Crespi-Reghizzi (FCT, 1991)

Real-Time Scheduling by Queue Automata. - Luca Breveglieri; Alessandra Cherubini; Stefano Crespi-Reghizzi (FTRTFT, 1992)

Window-based dedicated parallel architectures for image processing. - Anna Antola; Luca Breveglieri (ICPR (4), 1992)

System Level Policies for Fault Tolerance Issues in the FERMI Project. - A. Dell'Acqua; M. Hansen; Sami J. Inkinen; B. Lofstedt; J. P. Vanuxem; Christer Svensson; Jiren Yuan; H. Hentzell; L. Del Buono; J. David; J. F. Genat; H. Lebbolo; et al. (DFT, 1993)

Fair First Languages and Parallel Programme Schemes. - Luca Breveglieri; Alessandra Cherubini; Claudio Citrini; Stefano Crespi-Reghizzi (Developments in Language Theory, 1993)

Modular Design Methodologies for Image Processing Architectures. - Anna Antola; Alberto Avai; Luca Breveglieri; Andrea Paparella (VLSI Design, 1993)

Modular design methodologies for image processing architectures. - Anna Antola; Alberto Avai; Luca Breveglieri (IEEE Trans. Very Large Scale Integr. Syst., 1993)

A fast pipelined FFT unit. - Luca Breveglieri; Vincenzo Piuri (ASAP, 1994)

Column Compression Pipelined Multipliers. - Luca Breveglieri; Luigi Dadda; Vincenzo Piuri (ASAP, 1995)

A model for the evaluation of fault tolerance in the FERMI system. - Anna Antola; Luca Breveglieri (DFT, 1995)

Deterministic Parsing for Augmented Context-free Grammars. - Luca Breveglieri; Alessandra Cherubini; Stefano Crespi-Reghizzi (MFCS, 1995)

Balancing of Fault Tolerance in the New Version of the FERMI Channel Chip: a Functional Evaluation. - Anna Antola; Luca Breveglieri (DFT, 1996)

Multi-Push-Down Languages and Grammars. - Luca Breveglieri; Alessandra Cherubini; Claudio Citrini; Stefano Crespi-Reghizzi (Int. J. Found. Comput. Sci., 1996)

Fast Arithmetic and Fault Tolerance in the FERMI System. - Luca Breveglieri; Luigi Dadda; Vincenzo Piuri (ASAP, 1997)

Fair Expressions and Regular Languages over Lists. - Luca Breveglieri (RAIRO Theor. Informatics Appl., 1997)

A VLSI inner product macrocell. - Luca Breveglieri; Luigi Dadda (IEEE Trans. Very Large Scale Integr. Syst., 1998)

Modeling Operating Systems Schedulers with Multi-Stack-Queue Grammars. - Luca Breveglieri; Stefano Crespi-Reghizzi; Alessandra Cherubini (FCT, 1999)

Dedicated Circuits for the Generation of Windows in Image Processing Architectures. - Anna Antola; Luca Breveglieri (J. VLSI Signal Process., 2000)

Efficient finite field digital-serial multiplier architecture for cryptography applications. - Guido Bertoni; Luca Breveglieri; Pasqualina Fragneto (DATE, 2001)

On the Propagation of Faults and Their Detection in a Hardware Implementation of the Advanced Encryption Standard. - Guido Bertoni; Luca Breveglieri; Israel Koren; Paolo Maistri; Vincenzo Piuri (ASAP, 2002)

Efficient Software Implementation of AES on 32-Bit Platforms. - Guido Bertoni; Luca Breveglieri; Pasqualina Fragneto; Marco Macchetti; Stefano Marchesin 002 (CHES, 2002)

A Parity Code Based Fault Detection for an Implementation of the Advanced Encryption Standard. - Guido Bertoni; Luca Breveglieri; Israel Koren; Paolo Maistri; Vincenzo Piuri (DFT, 2002)

Digital Median Filters. - Luca Breveglieri; Vincenzo Piuri (J. VLSI Signal Process., 2002)

Concurrent Fault Detection in a Hardware Implementation of the RC5 Encryption Algorithm. - Guido Bertoni; Luca Breveglieri; Israel Koren; Paolo Maistri; Vincenzo Piuri (ASAP, 2003)

Detecting and Locating Faults in VLSI Implementations of the Advanced Encryption Standard. - Guido Bertoni; Luca Breveglieri; Israel Koren; Paolo Maistri; Vincenzo Piuri (DFT, 2003)

About the performances of the Advanced Encryption Standard in embedded systems with cache memory. - Guido Bertoni; A. Bircan; Luca Breveglieri; Pasqualina Fragneto; Marco Macchetti; Vittorio Zaccaria (ISCAS (5), 2003)

Error Analysis and Detection Procedures for a Hardware Implementation of the Advanced Encryption Standard. - Guido Bertoni; Luca Breveglieri; Israel Koren; Paolo Maistri; Vincenzo Piuri (IEEE Trans. Computers, 2003)

Detecting Faults in Four Symmetric Key Block Ciphers. - Luca Breveglieri; Israel Koren; Paolo Maistri (ASAP, 2004)

On the Generalized Linear Equivalence of Functions Over Finite Fields. - Luca Breveglieri; Alessandra Cherubini; Marco Macchetti (ASIACRYPT, 2004)

An Efficient Hardware-Based Fault Diagnosis Scheme for AES: Performances and Cost. - Guido Bertoni; Luca Breveglieri; Israel Koren; Paolo Maistri (DFT, 2004)

Workshop on Fault Diagnosis and Tolerance in Cryptography. - Luca Breveglieri; Israel Koren (DSN, 2004)

Efficient AES implementations for ARM based platforms. - Kubilay Atasu; Luca Breveglieri; Marco Macchetti (SAC, 2004)

Finding Optimum Parallel Coprocessor Design for Genus 2 Hyperelliptic Curve Cryptosystems. - Guido Bertoni; Luca Breveglieri; Thomas J. Wollinger; Christof Paar (IACR Cryptol. ePrint Arch., 2004)

Incorporating Error Detection and Online Reconfiguration into a Regular Architecture for the Advanced Encryption Standard. - Luca Breveglieri; Israel Koren; Paolo Maistri (DFT, 2005)

A Complete Formulation of Generalized Affine Equivalence. - Marco Macchetti; Mario Caironi; Luca Breveglieri; Alessandra Cherubini (ICTCS, 2005)

On-Line Testing for Secure Implementations: Design and Validation. - Régis Leveugle; Yervant Zorian; Luca Breveglieri; André K. Nieuwland; Klaus Rothbart; Jean-Pierre Seifert (IOLTS, 2005)

AES Power Attack Based on Induced Cache Miss and Countermeasure. - Guido Bertoni; Vittorio Zaccaria; Luca Breveglieri; Matteo Monchiero; Gianluca Palermo (ITCC (1), 2005)

A Parallelized Design for an Elliptic Curve Cryptosystem Coprocessor. - Fabio Sozzani; Guido Bertoni; Stefano Turcato; Luca Breveglieri (ITCC (1), 2005)

Speeding Up AES By Extending a 32 bit Processor Instruction Set. - Guido Bertoni; Luca Breveglieri; Roberto Farina; Francesco Regazzoni 001 (ASAP, 2006)

Software implementation of Tate pairing over GF(2m). - Guido Bertoni; Luca Breveglieri; Pasqualina Fragneto; Gerardo Pelosi; Luigi Sportiello (DATE Designers' Forum, 2006)

A Fault Attack Against the FOX Cipher Family. - Luca Breveglieri; Israel Koren; Paolo Maistri (FDTC, 2006)

Incorporating Error Detection in an RSA Architecture. - Luca Breveglieri; Israel Koren; Paolo Maistri; M. Ravasio (FDTC, 2006)

Performance of HECC Coprocessors Using Inversion-Free Formulae. - Thomas J. Wollinger; Guido Bertoni; Luca Breveglieri; Christof Paar (ICCSA (3), 2006)

A Note on Error Detection in an RSA Architecture by Means of Residue Codes. - Luca Breveglieri; Paolo Maistri; Israel Koren (IOLTS, 2006)

ECC Hardware Coprocessors for 8-bit Systems and Power Consumption Considerations. - Guido Bertoni; Luca Breveglieri; Matteo Venturi (ITNG, 2006)

Power Aware Design of an Elliptic Curve Coprocessor for 8 bit Platforms. - Guido Bertoni; Luca Breveglieri; Matteo Venturi (PerCom Workshops, 2006)

Guest Editors' Introduction: Special Section on Fault Diagnosis and Tolerance in Cryptography. - Luca Breveglieri; Israel Koren (IEEE Trans. Computers, 2006)

Power Attacks Resistance of Cryptographic S-Boxes with Added Error Detection Circuits. - Francesco Regazzoni 001; Thomas Eisenbarth 001; Johann Großschädl; Luca Breveglieri; Paolo Ienne; Israel Koren; Christof Paar (DFT, 2007)

Countermeasures against Branch Target Buffer Attacks. - Giovanni Agosta; Luca Breveglieri; Gerardo Pelosi; Israel Koren (FDTC, 2007)

Programming Highly Parallel Reconfigurable Architectures for Public-Key Cryptographic Applications. - Giovanni Agosta; Luca Breveglieri; Gerardo Pelosi; Martino Sykora (ITNG, 2007)

Programming Highly Parallel Reconfigurable Architectures for Symmetric and Asymmetric Cryptographic Applications. - Giovanni Agosta; Luca Breveglieri; Gerardo Pelosi; Martino Sykora (J. Comput., 2007)

An Operation-Centered Approach to Fault Detection in Symmetric Cryptography Ciphers. - Luca Breveglieri; Israel Koren; Paolo Maistri (IEEE Trans. Computers, 2007)

NP-completeness of the alphabetical satisfiability problem for trace equations. - Luca Breveglieri; Alessandra Cherubini; Claudia Di Nucci; Emanuele Rodaro (AFL, 2008)

Can Knowledge Regarding the Presence of Countermeasures Against Fault Attacks Simplify Power Attacks on Cryptographic Devices?. - Francesco Regazzoni 001; Thomas Eisenbarth 001; Luca Breveglieri; Paolo Ienne; Israel Koren (DFT, 2008)

A FPGA Coprocessor for the Cryptographic Tate Pairing over Fp. - Alessandro Barenghi; Guido Bertoni; Luca Breveglieri; Gerardo Pelosi (ITNG, 2008)

A 640 Mbit/S 32-Bit Pipelined Implementation of the AES Algorithm. - Guido Marco Bertoni; Luca Breveglieri; Roberto Farina; Francesco Regazzoni 001 (SECRYPT, 2008)

Parallel Hardware Architectures for the Cryptographic Tate Pairing. - Guido Marco Bertoni; Luca Breveglieri; Pasqualina Fragneto; Gerardo Pelosi (Int. J. Netw. Secur., 2008)

A pairing SW implementation for Smart-Cards. - Guido Bertoni; Luca Breveglieri; Liqun Chen 002; Pasqualina Fragneto; Keith A. Harrison; Gerardo Pelosi (J. Syst. Softw., 2008)

Practical Power Analysis Attacks to RSA on a Large IP Portfolio SoC. - Guido Marco Bertoni; Luca Breveglieri; Alessandro Cominola; Filippo Melzani; Ruggero Susella (ITNG, 2009)

Alphabetical Satisfiability Problem for Trace Equations. - Luca Breveglieri; Alessandra Cherubini; C. Nuccio; Emanuele Rodaro (Acta Cybern., 2009)

Fault attack on AES with single-bit induced faults. - Alessandro Barenghi; Guido Marco Bertoni; Luca Breveglieri; Mauro Pellicioli; Gerardo Pelosi (IAS, 2010)

Countermeasures against fault attacks on software implemented AES: effectiveness and cost. - Alessandro Barenghi; Luca Breveglieri; Israel Koren; Gerardo Pelosi; Francesco Regazzoni 001 (WESS, 2010)

Low Voltage Fault Attacks to AES. - Alessandro Barenghi; Guido Bertoni; Luca Breveglieri; Mauro Pellicioli; Gerardo Pelosi (HOST, 2010)

Low Voltage Fault Attacks to AES and RSA on General Purpose Processors. - Alessandro Barenghi; Guido Bertoni; Luca Breveglieri; Mauro Pellicioli; Gerardo Pelosi (IACR Cryptol. ePrint Arch., 2010)

Efficient recognition of trace languages defined by repeat-until loops. - Luca Breveglieri; Stefano Crespi-Reghizzi; Massimiliano Goldwurm (Inf. Comput., 2010)

Fault attack to the elliptic curve digital signature algorithm with multiple bit faults. - Alessandro Barenghi; Guido Marco Bertoni; Luca Breveglieri; Gerardo Pelosi; Andrea Palomba (SIN, 2011)

Fault Injection Attacks on Cryptographic Devices: Theory, Practice, and Countermeasures. - Alessandro Barenghi; Luca Breveglieri; Israel Koren; David Naccache (Proc. IEEE, 2012)

Injection Technologies for Fault Attacks on Microprocessors. - Alessandro Barenghi; Guido Marco Bertoni; Luca Breveglieri; Mauro Pellicioli; Gerardo Pelosi (Fault Analysis in Cryptography, 2012)

Interaction Between Fault Attack Countermeasures and the Resistance Against Power Analysis Attacks. - Francesco Regazzoni 001; Luca Breveglieri; Paolo Ienne; Israel Koren (Fault Analysis in Cryptography, 2012)

Parsing methods streamlined. - Luca Breveglieri; Stefano Crespi-Reghizzi; Angelo Morzenti (CoRR, 2013)

A fault induction technique based on voltage underfeeding with application to attacks against AES and RSA. - Alessandro Barenghi; Guido Marco Bertoni; Luca Breveglieri; Gerardo Pelosi (J. Syst. Softw., 2013)

Formal Languages and Compilation, Second Edition. - Stefano Crespi-Reghizzi; Luca Breveglieri; Angelo Morzenti (Springer, 2013)

Complexity of Extended vs. Classic LR Parsers. - Angelo Borsotti; Luca Breveglieri; Stefano Crespi-Reghizzi; Angelo Morzenti (DCFS, 2014)

Shift-Reduce Parsers for Transition Networks. - Luca Breveglieri; Stefano Crespi-Reghizzi; Angelo Morzenti (LATA, 2014)

From Ambiguous Regular Expressions to Deterministic Parsing Automata. - Angelo Borsotti; Luca Breveglieri; Stefano Crespi-Reghizzi; Angelo Morzenti (CIAA, 2015)

BSP: A Parsing Tool for Ambiguous Regular Expressions. - Angelo Borsotti; Luca Breveglieri; Stefano Crespi-Reghizzi; Angelo Morzenti (CIAA, 2015)

A Fault-Based Secret Key Retrieval Method for ECDSA: Analysis and Countermeasure. - Alessandro Barenghi; Guido Marco Bertoni; Luca Breveglieri; Gerardo Pelosi; Stefano Sanfilippo; Ruggero Susella (ACM J. Emerg. Technol. Comput. Syst., 2016)

Software-only Reverse Engineering of Physical DRAM Mappings for Rowhammer Attacks. - Alessandro Barenghi; Luca Breveglieri; Niccolò Izzo; Gerardo Pelosi (IVSW, 2018)

Fast deterministic parsers for transition networks. - Angelo Borsotti; Luca Breveglieri; Stefano Crespi-Reghizzi; Angelo Morzenti (Acta Informatica, 2018)

A secure and authenticated host-to-memory communication interface. - Niccolò Izzo; Alessandro Barenghi; Luca Breveglieri; Gerardo Pelosi; Paolo Amato (CF, 2019)

A Benchmark Production Tool for Regular Expressions. - Angelo Borsotti; Luca Breveglieri; Stefano Crespi-Reghizzi; Angelo Morzenti (CIAA, 2019)

Formal Languages and Compilation, Third Edition - Stefano Crespi-Reghizzi; Luca Breveglieri; Angelo Morzenti (Springer, 2019)

A Generalized LR(1) Parser or Extended Context-Free Grammars. - Angelo Borsotti; Luca Breveglieri; Stefano Crespi-Reghizzi; Angelo Morzenti (ICTCS, 2020)

Exploring Cortex-M Microarchitectural Side Channel Information Leakage. - Alessandro Barenghi; Luca Breveglieri; Niccolò Izzo; Gerardo Pelosi (IEEE Access, 2021)

A deterministic parsing algorithm for ambiguous regular expressions. - Angelo Borsotti; Luca Breveglieri; Stefano Crespi-Reghizzi; Angelo Morzenti (Acta Informatica, 2021)

Fast GLR parsers for extended BNF grammars and transition networks. - Angelo Borsotti; Luca Breveglieri; Stefano Crespi-Reghizzi; Angelo Morzenti (J. Comput. Lang., 2021)

General parsing with regular expression matching. - Angelo Borsotti; Luca Breveglieri; Stefano Crespi-Reghizzi; Angelo Morzenti (J. Comput. Lang., 2023)

A Comparison of Deep Learning Approaches for Power-Based Side-Channel Attacks. - Roberto Capoferri; Alessandro Barenghi; Luca Breveglieri; Niccolò Izzo; Gerardo Pelosi (NordSec, 2024)

Minimizing speculation overhead in a parallel recognizer for regular texts. - Angelo Borsotti; Luca Breveglieri; Angelo Morzenti; Stefano Crespi-Reghizzi (PPoPP, 2025)

Multi-entry DFA with Reduced Initial States to Speedup Parallel Recognition. - Angelo Borsotti; Luca Breveglieri; Stefano Crespi-Reghizzi; Angelo Morzenti (CIAA, 2025)

A parallel parser for regular expressions. - Angelo Borsotti; Luca Breveglieri; Stefano Crespi-Reghizzi; Angelo Morzenti (CoRR, 2025)