Three-Phase Dual-Rail Pre-charge Logic. - Marco Bucci; Luca Giancane; Raimondo Luzzi; Alessandro Trifiletti (CHES, 2006)

Enhancing power analysis attacks against cryptographic devices. - Marco Bucci; Luca Giancane; Raimondo Luzzi; Giuseppe Scotti; Alessandro Trifiletti (ISCAS, 2006)

A novel concept for stateless random bit generators in cryptographic applications. - Marco Bucci; Luca Giancane; Raimondo Luzzi; Mario Varanonuovo; Alessandro Trifiletti (ISCAS, 2006)

A Statistical Model of Logic Gates for Monte Carlo Simulation Including On-Chip Variations. - Francesco Centurelli; Luca Giancane; Mauro Olivieri; Giuseppe Scotti; Alessandro Trifiletti (PATMOS, 2007)

A Dynamic and Differential CMOS Lookup Table with Data-Independent Power Consumption for Cryptographic Applications on Chip Cards. - Marco Bucci; Luca Giancane; Raimondo Luzzi; Alessandro Trifiletti (IEEE Trans. Dependable Secur. Comput., 2007)

A new dynamic differential logic style as a countermeasure to power analysis attacks. - Luca Giancane; Piero Marietti; Mauro Olivieri; Giuseppe Scotti; Alessandro Trifiletti (ICECS, 2008)

Enhancing power analysis attacks against cryptographic devices. - Marco Bucci; Luca Giancane; Raimondo Luzzi; M. Marino; Giuseppe Scotti; Alessandro Trifiletti (IET Circuits Devices Syst., 2008)

Leakage Power Analysis attacks: Theoretical analysis and impact of variations. - Massimo Alioto; Luca Giancane; Giuseppe Scotti; Alessandro Trifiletti (ICECS, 2009)

Delay-based dual-rail pre-charge logic. - Marco Bucci; Luca Giancane; Raimondo Luzzi; Giuseppe Scotti; Alessandro Trifiletti (ICECS, 2009)

Power Analysis of a Chaos-based Random Number Generator for Cryptographic Security. - Fabio Pareschi; Giuseppe Scotti; Luca Giancane; Riccardo Rovatti; Gianluca Setti; Alessandro Trifiletti (ISCAS, 2009)

Leakage Power Analysis Attacks: A Novel Class of Attacks to Nanometer Cryptographic Circuits. - Massimo Alioto; Luca Giancane; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Leakage Power Analysis attacks: Effectiveness on DPA resistant logic styles under process variations. - Milena Djukanovic; Luca Giancane; Giuseppe Scotti; Alessandro Trifiletti; Massimo Alioto (ISCAS, 2011)

Delay-Based Dual-Rail Precharge Logic. - Marco Bucci; Luca Giancane; Raimondo Luzzi; Giuseppe Scotti; Alessandro Trifiletti (IEEE Trans. Very Large Scale Integr. Syst., 2011)

A Flip-Flop for the DPA Resistant Three-Phase Dual-Rail Pre-Charge Logic Family. - Marco Bucci; Luca Giancane; Raimondo Luzzi; Alessandro Trifiletti (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Adaptive Pre-Processing for Neural Network Hardware Deployment. - Dario Del Gaizo; Francesco De Palo; Fabio Cipriani; Luca Giancane (MLSP, 2023)