A 16-bit, 150-µW, 1-kS/s ADC with hybrid incremental and cyclic conversion scheme. - Luca Rossi 002; Steve Tanner; Pierre-André Farine (ICECS, 2009)

Performance Analysis of a Hybrid Incremental and Cyclic A/D Conversion Principle. - Luca Rossi 002; Steve Tanner; Pierre-André Farine (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

Reply to "Comments on 'Performance Analysis of a Hybrid Incremental and Cyclic A/D Conversion Principle'". - Luca Rossi 002; Steve Tanner; Pierre-André Farine (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)