Time to digital converter based on a 2-dimensions Vernier architecture. - Antonio Liscidini; Luca Vercesi; Rinaldo Castello (CICC, 2009)

Two-Dimensions Vernier Time-to-Digital Converter. - Luca Vercesi; Antonio Liscidini; Rinaldo Castello (IEEE J. Solid State Circuits, 2010)

A Dither-Less All Digital PLL for Cellular Transmitters. - Luca Vercesi; Luca Fanori; Fernando De Bernardinis; Antonio Liscidini; Rinaldo Castello (IEEE J. Solid State Circuits, 2012)