Image Encryption Algorithm Using Natural Interval Extensions. - Lucas Giovanni Nardo; Arthur Mendes Lima; Erivelton Geraldo Nepomuceno; Janier Arias-Garcia (CoRR, 2018)

A New PRNG Hardware Architecture Based on an Exponential Chaotic Map. - Matheus B. R. Cardoso; Samuel S. da Silva; Lucas Giovanni Nardo; Roberto M. Passos; Erivelton G. Nepomuceno; Janier Arias-Garcia (ISCAS, 2021)

Design of an Advanced System-on-Chip Architecture for Chaotic Image Encryption. - Arthur Mendes Lima; Lucas Giovanni Nardo; Erivelton Geraldo Nepomuceno; Janier Arias-Garcia; Jones Yudi Mori (SBCCI, 2023)

A New Chaos-Based PRNG Hardware Architecture Using the HUB Fixed-Point Format. - Samuel S. da Silva; Matheus B. R. Cardoso; Lucas Giovanni Nardo; Erivelton Geraldo Nepomuceno; Michael Hübner 001; Janier Arias-Garcia (IEEE Trans. Instrum. Meas., 2023)

Image encryption architecture exploiting finite-precision error for System-on-Chip and programmable logic devices. - Arthur Mendes Lima; Lucas Giovanni Nardo; Erivelton G. Nepomuceno; Janier Arias-Garcia; Jones Yudi Mori Alves da Silva (Comput. Electr. Eng., 2025)