Physical design and FinFETs. - Robert C. Aitken; Greg Yeric; Brian Cline; Saurabh Sinha; Lucian Shifren; Imran Iqbal; Vikas Chandra (ISPD, 2014)

Circuit design perspectives for Ge FinFET at 10nm and beyond. - Saurabh Sinha; Lucian Shifren; Vikas Chandra; Brian Cline; Greg Yeric; Robert C. Aitken; Bingjie Cheng; Andrew R. Brown; Craig Riddet; C. Alexandar; Campbell Millar; Asen Asenov (ISQED, 2015)

Near-threshold computing in FinFET technologies: opportunities for improved voltage scalability. - Nathaniel Ross Pinckney; Lucian Shifren; Brian Cline; Saurabh Sinha; Supreet Jeloka; Ronald G. Dreslinski; Trevor N. Mudge; Dennis Sylvester; David T. Blaauw (DAC, 2016)

Predicting future complementary metal-oxide-semiconductor technology - challenges and approaches. - Robert C. Aitken; Vikas Chandra; Brian Cline; Shidhartha Das; David Pietromonaco; Lucian Shifren; Saurabh Sinha; Greg Yeric (IET Comput. Digit. Tech., 2016)

ASAP7: A 7-nm finFET predictive process design kit. - Lawrence T. Clark; Vinay Vashishtha; Lucian Shifren; Aditya Gujja; Saurabh Sinha; Brian Cline; Chandarasekaran Ramamurthy; Greg Yeric (Microelectron. J., 2016)

Impact of FinFET on Near-Threshold Voltage Scalability. - Nathaniel Ross Pinckney; Supreet Jeloka; Ronald G. Dreslinski; Trevor N. Mudge; Dennis Sylvester; David T. Blaauw; Lucian Shifren; Brian Cline; Saurabh Sinha (IEEE Des. Test, 2017)

Extreme Temperature (> 200 °C), Radiation Hard (> 1 Mrad), Dense (sub-50 nm CD), Fast (2 ns write pulses), Non-Volatile Memory Technology. - Saurabh V. Suryavanshi; Greg Yeric; Max Irby; X. M. Henry Huang; Glen Rosendale; Lucian Shifren (IMW, 2022)