MIS-MV: Optimization of Multi-Level Logic with Multiple-Valued Inputs. - Luciano Lavagno; Sharad Malik; Robert K. Brayton; Alberto L. Sangiovanni-Vincentelli (ICCAD, 1990)

Algorithms for Synthesis of Hazard-Free Asynchronous Circuits. - Luciano Lavagno; Kurt Keutzer; Alberto L. Sangiovanni-Vincentelli (DAC, 1991)

Solving the State Assignment Problem for Signal Transition Graphs. - Luciano Lavagno; Cho W. Moon; Robert K. Brayton; Alberto L. Sangiovanni-Vincentelli (DAC, 1992)

Linear Programming for Optimum Hazard Elimination in Asynchronous Circuits. - Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli (ICCD, 1992)

Symbolic minimization of multilevel logic and the input encoding problem. - Sharad Malik; Luciano Lavagno; Robert K. Brayton; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992)

Automated synthesis of asynchronous interface circuits. - Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli (Microprocess. Microsystems, 1993)

OR Causality: Modelling and Hardware Implementation. - Alexandre Yakovlev; Michael Kishinevsky; Alex Kondratyev; Luciano Lavagno (Application and Theory of Petri Nets, 1994)

Designing asynchronous circuits from behavioural specifications with internal conflicts. - Jordi Cortadella; Luciano Lavagno; Peter Vanbekbergen; Alex Yakovlev (ASYNC, 1994)

A case study in computer-aided codesign of embedded controllers. - Luciano Lavagno; Massimiliano Chiodo; Paolo Giusto; Attila Jurecska; Harry Hsieh; S. Yee; Alberto L. Sangiovanni-Vincentelli; Kei Suzuki (CODES, 1994)

Testing redundant asynchronous circuits by variable phase splitting. - Luciano Lavagno; Antonio Lioy; Michael Kishinevsky (EURO-DAC, 1994)

PAPRICA-3: A Real-Time Morhphological Image Processor. - Alberto Broggi; Gianni Conte; G. Burzio; Luciano Lavagno; Francesco Gregoretti; Claudio Sansoè; Leonardo Maria Reyneri (ICIP (3), 1994)

Hardware-software codesign of embedded systems. - Massimiliano Chiodo; Paolo Giusto; Attila Jurecska; Harry Hsieh; Alberto L. Sangiovanni-Vincentelli; Luciano Lavagno (IEEE Micro, 1994)

A low latency asynchronous arbitration circuit. - Alexandre Yakovlev; A. Petrov; Luciano Lavagno (IEEE Trans. Very Large Scale Integr. Syst., 1994)

Linear programming for hazard elimination in asynchronous circuits. - Luciano Lavagno; Narendra V. Shenoy; Alberto L. Sangiovanni-Vincentelli (J. VLSI Signal Process., 1994)

Synthesis of Software Programs for Embedded Control Applications. - Massimiliano Chiodo; Paolo Giusto; Attila Jurecska; Luciano Lavagno; Harry Hsieh; Kei Suzuki; Alberto L. Sangiovanni-Vincentelli; Ellen Sentovich (DAC, 1995)

Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool. - Luciano Lavagno; Patrick C. McGeer; Alexander Saldanha; Alberto L. Sangiovanni-Vincentelli (DAC, 1995)

Synthesizing Petri nets from state-based models. - Jordi Cortadella; Michael Kishinevsky; Luciano Lavagno; Alexandre Yakovlev (ICCAD, 1995)

High-Level Modeling and Design of Asynchronous Interface Logic. - Alexandre Yakovlev; Albert Koelmans; Luciano Lavagno (IEEE Des. Test Comput., 1995)

Synthesis for testability techniques for asynchronous circuits. - Kurt Keutzer; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995)

Synthesis of hazard-free asynchronous circuits with bounded wire delays. - Luciano Lavagno; Kurt Keutzer; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995)

An efficient heuristic procedure for solving the state assignment problem for event-based specifications. - Luciano Lavagno; Cho W. Moon; Robert K. Brayton; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995)

Complete state encoding based on the theory of regions. - Jordi Cortadella; Michael Kishinevsky; Alex Kondratyev; Luciano Lavagno; Alex Yakovlev (ASYNC, 1996)

Formal Verification of Embedded Systems based on CFSM Networks. - Felice Balarin; Harry Hsieh; Attila Jurecska; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli (DAC, 1996)

Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis. - Jordi Cortadella; Michael Kishinevsky; Alex Kondratyev; Luciano Lavagno; Alexandre Yakovlev (DAC, 1996)

Incremental re-encoding for symbolic traversal of product machines. - Gianpiero Cabodi; Paolo Camurati; Luciano Lavagno; Stefano Quer; Robert K. Brayton; Ellen Sentovich (EURO-DAC, 1996)

Compact and complete test set generation for multiple stuck-faults. - Alok Agrawal; Alexander Saldanha; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli (ICCAD, 1996)

Enhancing FSM Traversal by Temporary Re-Encoding. - Gianpiero Cabodi; Luciano Lavagno; Enrico Macii; Massimo Poncino; Stefano Quer; Paolo Camurati; Ellen Sentovich (ICCD, 1996)

Design and Implementation of the Control Structure of the PAPRICA-3 Processor. - Francesco Gregoretti; F. Intini; Luciano Lavagno; Roberto Passerone; Leonardo Maria Reyneri (PDP, 1996)

Rapid-Prototyping of Embedded Systems via Reprogrammable Devices. - Stefano Cardelli; Massimiliano Chiodo; Paolo Giusto; Attila Jurecska; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli (RSP, 1996)

A case study in computer-aided co-design of embedded controllers. - Massimiliano Chiodo; Daniel W. Engels; Paolo Giusto; Harry Hsieh; Attila Jurecska; Luciano Lavagno; Kei Suzuki; Alberto L. Sangiovanni-Vincentelli (Des. Autom. Embed. Syst., 1996)

On the Models for Asynchronous Circuit Behaviour with OR Causality. - Alexandre Yakovlev; Michael Kishinevsky; Alex Kondratyev; Luciano Lavagno; Marta Pietkiewicz-Koutny (Formal Methods Syst. Des., 1996)

A Unified Signal Transition Graph Model for Asynchronous Control Circuit Synthesis. - Alexandre Yakovlev; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli (Formal Methods Syst. Des., 1996)

Coupling Asynchrony and Interrupts: Place Chart Nets. - Michael Kishinevsky; Jordi Cortadella; Alex Kondratyev; Luciano Lavagno; Alexander Taubin; Alexandre Yakovlev (ICATPN, 1997)

Trade-off evaluation in embedded system design via co-simulation. - Claudio Passerone; Luciano Lavagno; Claudio Sansoè; Massimiliano Chiodo; Alberto L. Sangiovanni-Vincentelli (ASP-DAC, 1997)

Technology Mapping for Speed-Independent Circuits: Decomposition and Resynthesis. - Alex Kondratyev; Michael Kishinevsky; Jordi Cortadella; Luciano Lavagno; Alexandre Yakovlev (ASYNC, 1997)

Partial order based approach to synthesis of speed-independent circuits. - Alexei L. Semenov; Alexandre Yakovlev; Enric Pastor; Marco A. Peña; Jordi Cortadella; Luciano Lavagno (ASYNC, 1997)

Automatic Generation of a Real-Time Operating System for Embedded Systems. - Felice Balarin; Massimiliano Chiodo; Attila Jurecska; Luciano Lavagno; Bassam Tabbara; Alberto L. Sangiovanni-Vincentelli (CODES, 1997)

Disjunctive Partitioning and Partial Iterative Squaring: An Effective Approach for Symbolic Traversal of Large Circuits. - Gianpiero Cabodi; Paolo Camurati; Luciano Lavagno; Stefano Quer (DAC, 1997)

Fast Hardware/Software Co-Simulation for Virtual Prototyping and Trade-Off Analysis. - Claudio Passerone; Luciano Lavagno; Massimiliano Chiodo; Alberto L. Sangiovanni-Vincentelli (DAC, 1997)

Verification and synthesis of counters based on symbolic techniques. - Gianpiero Cabodi; Paolo Camurati; Luciano Lavagno; Stefano Quer (ED&TC, 1997)

Technology mapping of speed-independent circuits based on combinational decomposition and resynthesis. - Jordi Cortadella; Michael Kishinevsky; Alex Kondratyev; Luciano Lavagno; Alexandre Yakovlev (ED&TC, 1997)

Asynchronous Implementation of Synchronous Esterel Specifications. - Raj S. Mitra; Bishnupriya Bhattacharya; Luciano Lavagno (VLSI Design, 1997)

DAC 97 Panel: Next-Generation HDLs. - Luciano Lavagno; Nanette Collins (IEEE Des. Test Comput., 1997)

Design of embedded systems: formal models, validation, and synthesis. - Stephen A. Edwards; Luciano Lavagno; Edward A. Lee; Alberto L. Sangiovanni-Vincentelli (Proc. IEEE, 1997)

A region-based theory for state assignment in speed-independent circuits. - Jordi Cortadella; Michael Kishinevsky; Alex Kondratyev; Luciano Lavagno; Alexandre Yakovlev (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997)

Identifying State Coding Conflicts in Asynchronous System Specifications Using Petri Net Unfoldings. - Alex Kondratyev; Jordi Cortadella; Michael Kishinevsky; Luciano Lavagno; Alexander Taubin; Alexandre Yakovlev (ACSD, 1998)

System-Level Design Models and Implementation Techniques. - Luciano Lavagno (ACSD, 1998)

A case study on modeling shared memory access effects during performance analysis of HW/SW systems. - Marcello Lajolo; Anand Raghunathan; Sujit Dey; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli (CODES, 1998)

A Case Study in Embedded System Design: An Engine Control Unit. - Tullio Cuatto; Claudio Passerone; Luciano Lavagno; Attila Jurecska; Antonino Damiano; Claudio Sansoè; Alberto L. Sangiovanni-Vincentelli (DAC, 1998)

Don't Care-Based BDD Minimization for Embedded Software. - Youpyo Hong; Peter A. Beerel; Luciano Lavagno; Ellen Sentovich (DAC, 1998)

Interface synthesis: a vertical slice from digital logic to software components. - Gaetano Borriello; Luciano Lavagno; Ross B. Ortega (ICCAD, 1998)

Lazy transition systems: application to timing optimization of asynchronous circuits. - Jordi Cortadella; Michael Kishinevsky; Alex Kondratyev; Luciano Lavagno; Alexander Taubin; Alexandre Yakovlev (ICCAD, 1998)

Intellectual Property Re-use in Embedded System Co-design: An Industrial Case Study. - Enrica Filippi; Luciano Lavagno; L. Licciardi; Archille Montanaro; Maurizio Paolini; Roberto Passerone; Marco Sgroi; Alberto L. Sangiovanni-Vincentelli (ISSS, 1998)

Rapid-Prototyping of Embedded Systems via Reprogrammable Devices. - Stefano Cardelli; Massimiliano Chiodo; Paolo Giusto; Attila Jurecska; Luciano Lavagno; Claudio Sansoè; Alberto L. Sangiovanni-Vincentelli (Des. Autom. Embed. Syst., 1998)

Scheduling for Embedded Real-Time Systems. - Felice Balarin; Luciano Lavagno; Praveen K. Murthy; Alberto L. Sangiovanni-Vincentelli (IEEE Des. Test Comput., 1998)

The Use of Petri Nets for the Design and Verification of Asynchronous Circuits and Systems. - Alex Kondratyev; Michael Kishinevsky; Alexander Taubin; Jordi Cortadella; Luciano Lavagno (J. Circuits Syst. Comput., 1998)

Deriving Petri Nets for Finite Transition Systems. - Jordi Cortadella; Michael Kishinevsky; Luciano Lavagno; Alexandre Yakovlev (IEEE Trans. Computers, 1998)

Partial-scan delay fault testing of asynchronous circuits. - Michael Kishinevsky; Alex Kondratyev; Luciano Lavagno; Alexander Saldanha; Alexander Taubin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998)

Modeling reactive systems in Java. - Claudio Passerone; Claudio Sansoè; Luciano Lavagno; Patrick C. McGeer; Jonathan Martin; Roberto Passerone; Alberto L. Sangiovanni-Vincentelli (ACM Trans. Design Autom. Electr. Syst., 1998)

Quasi-Static Scheduling of Embedded Software Using Equal Conflict Nets. - Marco Sgroi; Luciano Lavagno; Yosinori Watanabe; Alberto L. Sangiovanni-Vincentelli (ICATPN, 1999)

Fast Instruction Cache Simulation Strategies in a Hardware/Software Co-Design Environment. - Marcello Lajolo; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli (ASP-DAC, 1999)

Behavioral Transformations to Increase Noise Immunity in Asynchronous Specifications. - Alexander Taubin; Alex Kondratyev; Jordi Cortadella; Luciano Lavagno (ASYNC, 1999)

Automatic Synthesis and Optimization of Partially Specified Asynchronous Systems. - Alex Kondratyev; Jordi Cortadella; Michael Kishinevsky; Luciano Lavagno; Alexandre Yakovlev (DAC, 1999)

ECL: A Specification Environment for System-Level Design. - Luciano Lavagno; Ellen Sentovich (DAC, 1999)

Synthesis of Embedded Software Using Free-Choice Petri Nets. - Marco Sgroi; Luciano Lavagno (DAC, 1999)

Fast Hardware-Software Co-simulation Using VHDL Models. - Bassam Tabbara; Marco Sgroi; Alberto L. Sangiovanni-Vincentelli; Enrica Filippi; Luciano Lavagno (DATE, 1999)

What is the cost of delay insensitivity? - Hiroshi Saito; Alex Kondratyev; Jordi Cortadella; Luciano Lavagno; Alexandre Yakovlev (ICCAD, 1999)

Analysis of the quantization noise effects on the SQNR behaviour in analog to digital conversion. - Alberto L. Sangiovanni-Vincentelli; Marco Re; Luciano Lavagno; Gian Carlo Cardarilli; Roberto Lojacono (ISCAS (2), 1999)

CAD Techniques for Embedded System Design. - Srinivas Devadas; Sharad Malik; José Monteiro 001; Luciano Lavagno (VLSI Design, 1999)

Logic decomposition of speed-independent circuits. - Alex Kondratyev; Jordi Cortadella; Michael Kishinevsky; Luciano Lavagno; Alexandre Yakovlev (Proc. IEEE, 1999)

Synthesis of software programs for embedded control applications. - Felice Balarin; Massimiliano Chiodo; Paolo Giusto; Harry Hsieh; Attila Jurecska; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli; Ellen Sentovich; Kei Suzuki (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

Decomposition and technology mapping of speed-independent circuits using Boolean relations. - Jordi Cortadella; Michael Kishinevsky; Alex Kondratyev; Luciano Lavagno; Enric Pastor; Alexandre Yakovlev (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

Hardware and Petri Nets: Application to Asynchronous Circuit Design. - Jordi Cortadella; Michael Kishinevsky; Alex Kondratyev; Luciano Lavagno; Alexandre Yakovlev (ICATPN, 2000)

Automated Synthesis of Micro-Pipelines from Behavioral Verilog HDL. - Ivan Blunno; Luciano Lavagno (ASYNC, 2000)

Software performance estimation strategies in a system-level design tool. - Jwahar R. Bammi; Wido Kruijtzer; Luciano Lavagno; Edwin A. Harcourt; Mihai T. Lazarescu (CODES, 2000)

Automatic test bench generation for simulation-based validation. - Marcello Lajolo; Luciano Lavagno; Maurizio Rebaudengo; Matteo Sonza Reorda; Massimo Violante (CODES, 2000)

Formal Models for Communication-Based Design. - Alberto L. Sangiovanni-Vincentelli; Marco Sgroi; Luciano Lavagno (CONCUR, 2000)

Task generation and compile-time scheduling for mixed data-control embedded software. - Jordi Cortadella; Alex Kondratyev; Luciano Lavagno; Marc Massot; Sandra Moral; Claudio Passerone; Yosinori Watanabe; Alberto L. Sangiovanni-Vincentelli (DAC, 2000)

Efficient methods for embedded system design space exploration. - Harry Hsieh; Felice Balarin; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli (DAC, 2000)

Free MDD-Based Software Optimization Techniques for Embedded Systems. - Chunghee Kim; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli (DATE, 2000)

Efficient Power Co-Estimation Techniques for System-on-Chip Design. - Marcello Lajolo; Anand Raghunathan; Sujit Dey; Luciano Lavagno (DATE, 2000)

Evaluating System Dependability in a Co-Design Framework. - Marcello Lajolo; Maurizio Rebaudengo; Matteo Sonza Reorda; Massimo Violante; Luciano Lavagno (DATE, 2000)

System-level test bench generation in a co-design framework. - Marcello Lajolo; Maurizio Rebaudengo; Matteo Sonza Reorda; Massimo Violante; Luciano Lavagno (ETW, 2000)

A Simulink(c)-Based Approach to System Level Design and Architecture Selection. - Luciano Lavagno; Begoña Pino; Leonardo Maria Reyneri; A. Serra (EUROMICRO, 2000)

Behavioral-level test vector generation for system-on-chip designs. - Marcello Lajolo; Maurizio Rebaudengo; Matteo Sonza Reorda; Massimo Violante; Luciano Lavagno (HLDVT, 2000)

Compilation-based software performance estimation for system level design. - Mihai T. Lazarescu; Jwahar R. Bammi; Edwin A. Harcourt; Luciano Lavagno; Marcello Lajolo (HLDVT, 2000)

Early Power Estimation for System-on-Chip Designs. - Marcello Lajolo; Luciano Lavagno; Matteo Sonza Reorda; Massimo Violante (PATMOS, 2000)

Formal Models for Embedded System Design. - Marco Sgroi; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli (IEEE Des. Test Comput., 2000)

Verification of Similar FSMs by Mixing Incremental Re-encoding, Reachability Analysis, and Combinational Checks. - Stefano Quer; Gianpiero Cabodi; Paolo Camurati; Luciano Lavagno; Ellen Sentovich; Robert K. Brayton (Formal Methods Syst. Des., 2000)

Simulink-Based HW/SW Codesign of Embedded Neuro-Fuzzy Systems. - Leonardo Maria Reyneri; Marcello Chiaberge; Luciano Lavagno; Begoña Pino; Eduardo Miranda (Int. J. Neural Syst., 2000)

A software development tool chain for a reconfigurable processor. - Alberto La Rosa; Luciano Lavagno; Claudio Passerone (CASES, 2001)

Embedded system design specification: merging reactive control and data computation. - Marco Antoniotti; Alberto Ferrari; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli; Ellen Sentovich (CDC, 2001)

High-level architectural co-simulation using Esterel and C. - André Chátelain; Yves Mathys; Giovanni Placido; Alberto La Rosa; Luciano Lavagno (CODES, 2001)

Embedded UML: a merger of real-time UML and co-design. - Grant Martin; Luciano Lavagno; Jean Louis-Guerin (CODES, 2001)

A Hardware/Software Co-design Flow and IP Library Based of SimulinkTM. - Leonardo Maria Reyneri; Franceso Cucinotta; Alessandro Serra; Luciano Lavagno (DAC, 2001)

Generation of minimal size code for scheduling graphs. - Claudio Passerone; Yosinori Watanabe; Luciano Lavagno (DATE, 2001)

Constraints specification at higher levels of abstraction. - Felice Balarin; Jerry R. Burch; Luciano Lavagno; Yosinori Watanabe; Roberto Passerone; Alberto L. Sangiovanni-Vincentelli (HLDVT, 2001)

System-Level Power/Performance Analysis of Portable Multimedia Systems Communicating over Wireless Channels. - Radu Marculescu; Amit Nandi; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli (ICCAD, 2001)

Synchronous approach to the functional equivalence of embeddedsystem implementations. - Harry Hsieh; Felice Balarin; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

Modeling and Designing Heterogeneous Systems. - Felice Balarin; Luciano Lavagno; Claudio Passerone; Alberto L. Sangiovanni-Vincentelli; Marco Sgroi; Yosinori Watanabe (Concurrency and Hardware Design, 2002)

Quasi-Static Scheduling of Independent Tasksfor Reactive Systems. - Jordi Cortadella; Alex Kondratyev; Luciano Lavagno; Claudio Passerone; Yosinori Watanabe (ICATPN, 2002)

Concurrent execution semantics and sequential simulation algorithms for the metropolis meta-model. - Felice Balarin; Luciano Lavagno; Claudio Passerone; Alberto L. Sangiovanni-Vincentelli; Yosinori Watanabe; Guang Yang 004 (CODES, 2002)

False Path Elimination in Quasi-Static Scheduling. - G. Arrigoni; L. Duchini; Claudio Passerone; Luciano Lavagno; Yosinori Watanabe (DATE, 2002)

Processes, Interfaces and Platforms. Embedded Software Modeling in Metropolis. - Felice Balarin; Luciano Lavagno; Claudio Passerone; Yosinori Watanabe (EMSOFT, 2002)

Models of IP's for Automotive Virtual Integration Platforms. - Paolo Giusto; Jean-Yves Brunel; Alberto Ferrari; Eliane Fourgeau; Luciano Lavagno; Barry O'Rourke; Alberto L. Sangiovanni-Vincentelli; Emanuele Guasto (ICCD, 2002)

Automotive Virtual Integration Platforms: Why's, What's, and How's. - Paolo Giusto; Jean-Yves Brunel; Alberto Ferrari; Eliane Fourgeau; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli (ICCD, 2002)

A Symbolic Approach for the Combined Solution of Scheduling and Allocation. - Luciano Lavagno; Mihai T. Lazarescu; Stefano Quer; Sergio Nocco; Claudio Passerone; Gianpiero Cabodi (ISSS, 2002)

Specification, Modeling and Design Tools for System-on-Chip (Tutorial Abstract). - Luciano Lavagno; Sujit Dey; Rajesh K. Gupta 001 (ASP-DAC/VLSI Design, 2002)

Guest Editors' Introduction: Hot Topics at This Year's Design Automation Conference. - David T. Blaauw; Luciano Lavagno (IEEE Des. Test Comput., 2002)

Design of Asynchronous Controllers with Delay Insensitive Interface. - Hiroshi Saito; Alex Kondratyev; Jordi Cortadella; Luciano Lavagno; Alex Yakovlev; Takashi Nanya (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

Guest Editor?s Introduction: Systems on a Chip–The Next Electronic Frontier. - Luciano Lavagno (IEEE Micro, 2002)

Lazy transition systems and asynchronous circuit synthesis withrelative timing assumptions. - Jordi Cortadella; Michael Kishinevsky; Steven M. Burns; Alex Kondratyev; Luciano Lavagno; Ken S. Stevens; Alexander Taubin; Alexandre Yakovlev (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002)

Cosimulation-based power estimation for system-on-chip design. - Marcello Lajolo; Anand Raghunathan; Sujit Dey; Luciano Lavagno (IEEE Trans. Very Large Scale Integr. Syst., 2002)

UML and Platform-based Design. - Rong Chen; Marco Sgroi; Luciano Lavagno; Grant Martin; Alberto L. Sangiovanni-Vincentelli; Jan M. Rabaey (UML for Real, 2003)

Quasi-Static Scheduling for Concurrent Architectures. - Jordi Cortadella; Alex Kondratyev; Luciano Lavagno; Yosinori Watanabe (ACSD, 2003)

Hardware/Software Design Space Exploration for a Reconfigurable Processor. - Alberto La Rosa; Luciano Lavagno; Claudio Passerone (DATE, 2003)

Design Space Exploration for a Wireless Protocol on a Reconfigurable Platform. - Laura Vanzago; Bishnupriya Bhattacharya; Joel Cambonie; Luciano Lavagno (DATE, 2003)

A Reconfigurable Processor Architecture and Software Development Environment for Embedded Systems. - Fabio Campi; Andrea Cappelli; Roberto Guerrieri; Andrea Lodi 002; Mario Toma; Alberto La Rosa; Luciano Lavagno; Claudio Passerone; Roberto Canegallo (IPDPS, 2003)

Metropolis: An Integrated Electronic System Design Environment. - Felice Balarin; Yosinori Watanabe; Harry Hsieh; Luciano Lavagno; Claudio Passerone; Alberto L. Sangiovanni-Vincentelli (Computer, 2003)

DAC Highlights. - Luciano Lavagno; Limor Fix (IEEE Des. Test Comput., 2003)

A BMC-formulation for the scheduling problem in highly constrained hardware Systems. - Gianpiero Cabodi; Sergio Nocco; Stefano Quer; Alex Kondratyev; Luciano Lavagno; Yosinori Watanabe (BMC@CAV, 2003)

Guest Editors' Introduction: Trends and Directions in Microelectronics. - Alberto L. Sangiovanni-Vincentelli; Luciano Lavagno (IEEE Micro, 2003)

Guest Editorial. - David T. Blaauw; Luciano Lavagno (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003)

Handshake Protocols for De-Synchronization. - Ivan Blunno; Jordi Cortadella; Alex Kondratyev; Luciano Lavagno; Kelvin Lwin; Christos P. Sotiriou (ASYNC, 2004)

SoftContract: an Assertion-Based Software Development Process that Enables Design-by-Contract. - Jean-Yves Brunel; Marco Di Natale; Alberto Ferrari; Paolo Giusto; Luciano Lavagno (DATE, 2004)

From Synchronous to Asynchronous: An Automatic Approach. - Jordi Cortadella; Alex Kondratyev; Luciano Lavagno; Kelvin Lwin; Christos P. Sotiriou (DATE, 2004)

Implementation of a UMTS Turbo-Decoder on a Dynamically Reconfigurable Platform. - Alberto La Rosa; Claudio Passerone; Francesco Gregoretti; Luciano Lavagno (DATE, 2004)

Coping with The Variability of Combinational Logic Delays. - Jordi Cortadella; Alex Kondratyev; Luciano Lavagno; Christos P. Sotiriou (ICCD, 2004)

SoftContract: Model-Based Design of Error-Checking Code and Property Monitors. - Luciano Lavagno; Marco Di Natale; Alberto Ferrari; Paolo Giusto (UML Satellite Activities, 2004)

DAC Highlights. - Luciano Lavagno (IEEE Des. Test Comput., 2004)

Quasi-static Scheduling for Concurrent Architectures. - Jordi Cortadella; Alex Kondratyev; Luciano Lavagno; Alexander Taubin; Yosinori Watanabe (Fundam. Informaticae, 2004)

Designing an asynchronous microcontroller using Pipefitter. - Ivan Blunno; Luciano Lavagno (IEEE Trans. Very Large Scale Integr. Syst., 2004)

Design of Embedded Systems. - Luciano Lavagno; Claudio Passerone (The Industrial Information Technology Handbook, 2005)

A Time Slice Based Scheduler Model for System Level Design. - Luciano Lavagno; Claudio Passerone; Vishal Shah; Yosinori Watanabe (DATE, 2005)

Software Development for High-Performance, Reconfigurable, Embedded Multimedia Systems. - Alberto La Rosa; Luciano Lavagno; Claudio Passerone (IEEE Des. Test Comput., 2005)

A BMC-based formulation for the scheduling problem of hardware systems. - Gianpiero Cabodi; Alex Kondratyev; Luciano Lavagno; Sergio Nocco; Stefano Quer; Yosinori Watanabe (Int. J. Softw. Tools Technol. Transf., 2005)

Quasi-static scheduling of independent tasks for reactive systems. - Jordi Cortadella; Alex Kondratyev; Luciano Lavagno; Claudio Passerone; Yosinori Watanabe (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005)

Implementation of a UMTS turbo decoder on a dynamically reconfigurable platform. - Alberto La Rosa; Luciano Lavagno; Claudio Passerone (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005)

Guidelines for a graduate curriculum on embedded software and systems. - Paul Caspi; Alberto L. Sangiovanni-Vincentelli; Luís Almeida 001; Albert Benveniste; Bruno Bouyssounouse; Giorgio C. Buttazzo; Ivica Crnkovic; Werner Damm; Jakob Engblom; Gerhard Fohler; Marisol García-Valls; Hermann Kopetz; et al. (ACM Trans. Embed. Comput. Syst., 2005)

Design of Embedded Systems. - Luciano Lavagno; Claudio Passerone (Embedded Systems Handbook, 2005)

Quasi-Static Scheduling of Concurrent Specifications. - Luciano Lavagno; Claudio Passerone; Alex Kondratyev; Yosinori Watanabe (Embedded Systems Handbook, 2005)

Embedded Systems. - Luciano Lavagno; Richard Zurawski (Embedded Systems Handbook, 2005)

An ultra-low energy asynchronous processor for Wireless Sensor Networks. - Luca Necchi; Luciano Lavagno; Davide Pandini; Laura Vanzago (ASYNC, 2006)

Desynchronization: Synthesis of Asynchronous Circuits From Synchronous Specifications. - Jordi Cortadella; Alex Kondratyev; Luciano Lavagno; Christos P. Sotiriou (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

A Fully-Automated Desynchronization Flow for Synchronous Circuits. - Nikolaos Andrikos; Luciano Lavagno; Davide Pandini; Christos P. Sotiriou (DAC, 2007)

E2RINA: an Energy Efficient and Reliable In-Network Aggregation for Clustered Wireless Sensor Networks. - Luca Necchi; Alvise Bonivento; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli; Laura Vanzago (WCNC, 2007)

Design Automation of Real-Life Asynchronous Devices and Systems. - Alexander Taubin; Jordi Cortadella; Luciano Lavagno; Alex Kondratyev; Ad M. G. Peeters (Found. Trends Electron. Des. Autom., 2007)

A Symbolic Algorithm for the Synthesis of Bounded Petri Nets. - Josep Carmona 001; Jordi Cortadella; Michael Kishinevsky; Alex Kondratyev; Luciano Lavagno; Alexandre Yakovlev (Petri Nets, 2008)

Porting application between wireless sensor network software platforms: TinyOS, MANTIS and ZigBee. - Mohammad Mostafizur Rahman Mozumdar; Francesco Gregoretti; Luciano Lavagno; Laura Vanzago (ETFA, 2008)

An Algorithm for Selecting the Cluster Leader in a Partially Connected Sensor Network. - Mohammad Mostafizur Rahman Mozumdar; Francesco Gregoretti; Luciano Lavagno; Laura Vanzago (ICSNC, 2008)

A Framework for Modeling, Simulation and Automatic Code Generation of Sensor Network Application. - Mohammad Mostafizur Rahman Mozumdar; Francesco Gregoretti; Luciano Lavagno; Laura Vanzago; Stefano Olivieri (SECON, 2008)

Design of Embedded Systems. - Luciano Lavagno; Claudio Passerone (Embedded Systems Design and Verification, 2009)

Enabling adaptability through elastic clocks. - Emre Tuncer; Jordi Cortadella; Luciano Lavagno (DAC, 2009)

Efficient energy consumption and node distribution algorithm of 802.15.4 physical layer for WSN. - Anwar Al-Khateeb; Noureddine Boujnah; Luciano Lavagno (Wireless Days, 2009)

An Efficient Data Aggregation Algorithm for Cluster-based Sensor Network. - Mohammad Mostafizur Rahman Mozumdar; Guofang Nan; Francesco Gregoretti; Luciano Lavagno; Laura Vanzago (J. Networks, 2009)

A comparison of software platforms for wireless sensor networks: MANTIS, TinyOS, and ZigBee. - Mohammad Mostafizur Rahman Mozumdar; Luciano Lavagno; Laura Vanzago (ACM Trans. Embed. Comput. Syst., 2009)

Incremental high-level synthesis. - Luciano Lavagno; Alex Kondratyev; Yosinori Watanabe; Qiang Zhu 005; Mototsugu Fujii; Mitsuru Tatesawa; Noriyasu Nakayama (ASP-DAC, 2010)

Energy and throughput optimization of a Zigbee-compatible MAC protocol for wireless sensor networks. - Anwar Al-Khateeb; Luciano Lavagno (CSNDSP, 2010)

Energy optimization at the MAC layer for a forest fire monitoring wireless sensor network. - Anwar Al-Khateeb; Jun Kyoung Kim; Luciano Lavagno; Mihai T. Lazarescu (ETFA, 2010)

An extended framework for the development of WSN applications. - Luigi Pomante; Antonio Spinosi; Mohammad Mostafizur Rahman Mozumdar; Stefano Olivieri; Luciano Lavagno (ICUMT, 2010)

Energy optimization framework for WSN design. - Anwar Al-Khateeb; Luciano Lavagno (IPSN, 2010)

MEOW: Model-based design of an energy-optimized protocol stack for wireless sensor networks. - Anwar Al-Khateeb; Luciano Lavagno (LCN, 2010)

HILAC: A framework for Hardware In the Loop simulation and multi-platform Automatic Code Generation of WSN Applications. - Mohammad Mostafizur Rahman Mozumdar; Luciano Lavagno; Laura Vanzago; Alberto L. Sangiovanni-Vincentelli (SIES, 2010)

Hy-Sim: model based hybrid simulation framework for WSN application development. - Zhen Yu Song; Mohammad Mostafizur Rahman Mozumdar; Maurizio Tranchero; Luciano Lavagno; Riccardo Tomasi; Stefano Olivieri (SimuTools, 2010)

Improving Electro-Magnetic Interference of Embedded Systems Through Jittered-Delay Desynchronization. - Nikolaos Andrikos; Luciano Lavagno; Fabio Campi; Davide Pandini (J. Low Power Electron., 2010)

Speeding-up heuristic allocation, scheduling and binding with SAT-based abstraction/refinement techniques. - Gianpiero Cabodi; Luciano Lavagno; Marco Murciano; Alex Kondratyev; Yosinori Watanabe (ACM Trans. Design Autom. Electr. Syst., 2010)

Optimal and Heuristic Scheduling Algorithms for Asynchronous High-Level Synthesis. - Nikolaos Andrikos; Luciano Lavagno (ASYNC, 2011)

An extended framework for WSN applications. - Luigi Pomante; Antonio Spinosi; Mohammad Mostafizur Rahman Mozumdar; Stefano Olivieri; Luciano Lavagno (CCNC, 2011)

An Energy and Memory-Efficient Key Management Scheme for Mobile Heterogeneous Sensor Networks. - Sarmad Ullah Khan; Claudio Pastrone; Luciano Lavagno; Maurizio A. Spirito (CRiSIS, 2011)

Realistic performance-constrained pipelining in high-level synthesis. - Alex Kondratyev; Luciano Lavagno; Mike Meyer; Yosinori Watanabe (DATE, 2011)

Model-based rapid prototyping of multirate digital signal processing algorithms. - Shahzad Ahmad Butt; Luciano Lavagno (NORCHIP, 2011)

Guest Editors' Introduction: Asynchronous Design Is Here to Stay (and Is More Mainstream Than You Thought). - Luciano Lavagno; Montek Singh (IEEE Des. Test Comput., 2011)

PID (Partial Inversion Data): An M-of-N Level-Encoded Transition Signaling Protocol for Asynchronous Global Communication. - Marco Cannizzaro; Luciano Lavagno (ASYNC, 2012)

Designing parameterized signal processing ips for high level synthesis in a model based design environment. - Shahzad Ahmad Butt; Luciano Lavagno (CODES+ISSS, 2012)

Exploiting area/delay tradeoffs in high-level synthesis. - Alex Kondratyev; Luciano Lavagno; Mike Meyer; Yosinori Watanabe (DATE, 2012)

FASTCUDA: Open Source FPGA Accelerator & Hardware-Software Codesign Toolset for CUDA Kernels. - Iakovos Mavroidis; Ioannis Mavroidis; Ioannis Papaefstathiou; Luciano Lavagno; Mihai T. Lazarescu; Eduardo de la Torre; Florian Schäfer 001 (DSD, 2012)

A routing-algorithm-aware design tool for indoor wireless sensor networks. - Alberto Puggelli; Mohammad Mostafizur Rahman Mozumdar; Alberto L. Sangiovanni-Vincentelli; Luciano Lavagno (ICNC, 2012)

A Service-driven Development Tool for Wireless Sensor Network. - Zhen Yu Song; Luciano Lavagno; Riccardo Tomasi; Maurizio A. Spirito (PECCS, 2012)

Dynamic Trace-Based Data Dependency Analysis for Parallelization of C Programs. - Mihai T. Lazarescu; Luciano Lavagno (SCAM, 2012)

Selected Articles from the CDNLive! EMEA 2012 Conference. - Luciano Lavagno; Patrick Haspel (J. Low Power Electron., 2012)

An Authentication and Key Establishment Scheme for the IP-Based Wireless Sensor Networks. - Sarmad Ullah Khan; Claudio Pastrone; Luciano Lavagno; Maurizio A. Spirito (ANT/MobiWIS, 2012)

Share with care: a quantitative evaluation of sharing approaches in high-level synthesis. - Alex Kondratyev; Luciano Lavagno; Mike Meyer; Yosinori Watanabe (DATE, 2013)

EU FP7-288307 Pharaon Project: Parallel and Heterogeneous Architecture for Real-Time Applications. - Hector Posadas; Eugenio Villar; Florian Broekaert; Michel Bourdellès; Albert Cohen 001; Antoniu Pop; Nhat Minh Lê; Adrien Guatto; Mihai T. Lazarescu; Luciano Lavagno; Andrei Sergeevich Terechko; Miguel Glassee; et al. (DSD, 2013)

Design space exploration and synthesis for digital signal processing algorithms from Simulink models. - Shahzad Ahmad Butt; Luciano Lavagno (IDT, 2013)

A key management scheme for Content Centric Networking. - Sarmad Ullah Khan; Thibault Cholez; Thomas Engel 001; Luciano Lavagno (IM, 2013)

Design of a pseudo-log image transform IP in an HLS-based memory management framework. - Shahzad Ahmad Butt; Stéphane Mancini; Frédéric Rousseau 001; Luciano Lavagno (Real-Time Image and Video Processing, 2013)

Implementation and performance analysis of variable latency adders. - Ali Sayyed; Luciano Lavagno; Shah Khalid; Najeeb Ur Rahman (SoCC, 2013)

HEAP: A Highly Efficient Adaptive multi-Processor framework. - Luciano Lavagno; Mihai T. Lazarescu; Ioannis Papaefstathiou; Andreas Brokalakis; Johan Walters; Bart Kienhuis; Florian Schäfer 001 (Microprocess. Microsystems, 2013)

Metastability in Better-Than-Worst-Case Designs. - Salomon Beer; Marco Cannizzaro; Jordi Cortadella; Ran Ginosar; Luciano Lavagno (ASYNC, 2014)

Energy-aware parallelization flow and toolset for C code. - Mihai T. Lazarescu; Albert Cohen 001; Adrien Guatto; Nhat Minh Lê; Luciano Lavagno; Antoniu Pop; Manuel Prieto; Andrei Sergeevich Terechko; Alexandru Sutii (SCOPES, 2014)

Online Authentication and Key Establishment Scheme for Heterogeneous Sensor Networks. - Sarmad Ullah Khan; Luciano Lavagno; Claudio Pastrone; Maurizio A. Spirito (Int. J. Distributed Sens. Networks, 2014)

A Secure Online Key Establishment Scheme for Mobile Heterogeneous Sensor Networks. - Sarmad Ullah Khan; Claudio Pastrone; Luciano Lavagno; Maurizio A. Spirito (Int. J. Distributed Sens. Networks, 2014)

Design of a pseudo-log image transform hardware accelerator in a high-level synthesis-based memory management framework. - Shahzad Ahmad Butt; Stéphane Mancini; Frédéric Rousseau 001; Luciano Lavagno (J. Electronic Imaging, 2014)

Improving the design flow for parallel and heterogeneous architectures running real-time applications: The PHARAON FP7 project. - Héctor Posadas; Alejandro Nicolás; Pablo Peñil; Eugenio Villar; Florian Broekaert; Michel Bourdellès; Albert Cohen 001; Mihai T. Lazarescu; Luciano Lavagno; Andrei Sergeevich Terechko; Miguel Glassee; Manuel Prieto (Microprocess. Microsystems, 2014)

A Model-Based Approach for Bridging Virtual and Physical Sensor Nodes in a Hybrid Simulation Framework. - Mohammad Mozumdar; Zhen Yu Song; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli (Sensors, 2014)

Reactive clocks with variability-tracking jitter. - Jordi Cortadella; Luciano Lavagno; Pedro Lopez; Marc Lupon; Alberto Moreno; Antoni Roca 001; Sachin S. Sapatnekar (ICCD, 2015)

Low power methodology for an ASIC design flow based on high-level synthesis. - Fahad Bin Muslim; Affaq Qamar; Luciano Lavagno (SoftCOM, 2015)

Analysis and Implementation of the Semi-Global Matching 3D Vision Algorithm Using Code Transformations and High-Level Synthesis. - Affaq Qamar; Fahad Bin Muslim; Luciano Lavagno (VTC Spring, 2015)

Routing-Aware Design of Indoor Wireless Sensor Networks Using an Interactive Tool. - Alberto Puggelli; Mohammad Mostafizur Rahman Mozumdar; Luciano Lavagno; Alberto L. Sangiovanni-Vincentelli (IEEE Syst. J., 2015)

SafeRazor: Metastability-Robust Adaptive Clocking in Resilient Circuits. - Marco Cannizzaro; Salomon Beer; Jordi Cortadella; Ran Ginosar; Luciano Lavagno (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Interactive Trace-Based Analysis Toolset for Manual Parallelization of C Programs. - Mihai T. Lazarescu; Luciano Lavagno (ACM Trans. Embed. Comput. Syst., 2015)

Virtual Platform-Based Design Space Exploration of Power-Efficient Distributed Embedded Applications. - Parinaz Sayyah; Mihai T. Lazarescu; Sara Bocchio; Emad Samuel Malki Ebeid; Gianluca Palermo; Davide Quaglia; Alberto Rosti; Luciano Lavagno (ACM Trans. Embed. Comput. Syst., 2015)

ECOSCALE: Reconfigurable computing and runtime system for future exascale systems. - Iakovos Mavroidis; Ioannis Papaefstathiou; Luciano Lavagno; Dimitrios S. Nikolopoulos; Dirk Koch; John Goodacre; Ioannis Sourdis; Vassilis Papaefstathiou; Marcello Coppola; Manuel Palomino (DATE, 2016)

High Performance and Low Power Monte Carlo Methods to Option Pricing Models via High Level Design and Synthesis. - Liang Ma 003; Fahad Bin Muslim; Luciano Lavagno (EMS, 2016)

Energy-efficient FPGA Implementation of the k-Nearest Neighbors Algorithm Using OpenCL. - Fahad Bin Muslim; Alexandros Demian; Liang Ma 003; Luciano Lavagno; Affaq Qamar (FedCSIS (Position Papers), 2016)

A Tagless Indoor Localization System Based on Capacitive Sensing Technology. - Alireza Ramezani Akhmareh; Mihai Teodor Lazarescu; Osama Bin Tariq; Luciano Lavagno (Sensors, 2016)

Integrated Toolset for WSN Application Planning, Development, Commissioning and Maintenance: The WSN-DPCM ARTEMIS-JU Project. - Christos P. Antonopoulos; Katerina Asimogloy; Sarah Chiti; Luca D'Onofrio; Simone Gianfranceschi; Danping He; Antonio Iodice; Stavros A. Koubias; Christos Koulamas; Luciano Lavagno; Mihai T. Lazarescu; Gabriel Mujica; et al. (Sensors, 2016)

Designing Parameterizable Hardware IPs in a Model-Based Design Environment for High-Level Synthesis. - Shahzad Ahmad Butt; Mehdi Roozmeh; Luciano Lavagno (ACM Trans. Embed. Comput. Syst., 2016)

Long range, high sensitivity, low noise capacitive sensor for tagless indoor human localization. - Javed Iqbal 003; Mihai Teodor Lazarescu; Osama Bin Tariq; Luciano Lavagno (IWASI, 2017)

Implementation of a performance optimized database join operation on FPGA-GPU platforms using OpenCL. - Mehdi Roozmeh; Luciano Lavagno (NORCAS, 2017)

High sensitivity, low noise front-end for long range capacitive sensors for tagless indoor human localization. - Javed Iqbal 003; Mihai Teodor Lazarescu; Arslan Arif; Luciano Lavagno (RTSI, 2017)

Acceleration by Inline Cache for Memory-Intensive Algorithms on FPGA via High-Level Synthesis. - Liang Ma 003; Luciano Lavagno; Mihai Teodor Lazarescu; Arslan Arif (IEEE Access, 2017)

Efficient FPGA Implementation of OpenCL High-Performance Computing Applications via High-Level Synthesis. - Fahad Bin Muslim; Liang Ma 003; Mehdi Roozmeh; Luciano Lavagno (IEEE Access, 2017)

High-Level Synthesis for Semi-Global Matching: Is the Juice Worth the Squeeze? - Affaq Qamar; Fahad Bin Muslim; Francesco Gregoretti; Luciano Lavagno; Mihai Teodor Lazarescu (IEEE Access, 2017)

Performance of Machine Learning Classifiers for Indoor Person Localization With Capacitive Sensors. - Osama Bin Tariq; Mihai Teodor Lazarescu; Javed Iqbal 003; Luciano Lavagno (IEEE Access, 2017)

LP-HLS: Automatic power-intent generation for high-level synthesis based hardware implementation flow. - Affaq Qamar; Fahad Bin Muslim; Javed Iqbal 003; Luciano Lavagno (Microprocess. Microsystems, 2017)

Wireless Sensor Networks. - Mihai Teodor Lazarescu; Luciano Lavagno (Handbook of Hardware/Software Codesign, 2017)

HLS Algorithmic Explorations for HPC Execution on Reconfigurable Hardware - ECOSCALE. - Pavlos Malakonakis; Konstantinos Georgopoulos; Aggelos Ioannou; Luciano Lavagno; Ioannis Papaefstathiou; Iakovos Mavroidis (ARC, 2018)

Design and Implementation of a Dynamic Information Flow Tracking Architecture to Secure a RISC-V Core for IoT Applications. - Christian Palmiero; Giuseppe Di Guglielmo; Luciano Lavagno; Luca P. Carloni (HPEC, 2018)

Design space exploration of multi-core RTL via high level synthesis from OpenCL models. - Mehdi Roozmeh; Luciano Lavagno (Microprocess. Microsystems, 2018)

Capacitive Sensor for Tagless Remote Human Identification Using Body Frequency Absorption Signatures. - Javed Iqbal 003; Mihai Teodor Lazarescu; Osama Bin Tariq; Arslan Arif; Luciano Lavagno (IEEE Trans. Instrum. Meas., 2018)

Exact and Heuristic Allocation of Multi-kernel Applications to Multi-FPGA Platforms. - Junnan Shan; Mario R. Casu; Jordi Cortadella; Luciano Lavagno; Mihai T. Lazarescu (DAC, 2019)

Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs. - Yifan Yang; Qijing Huang 001; Bichen Wu; Tianjun Zhang; Liang Ma 003; Giulio Gambardella; Michaela Blott; Luciano Lavagno; Kees A. Vissers; John Wawrzynek; Kurt Keutzer (FPGA, 2019)

Neural network-based indoor tag-less localization using capacitive sensors. - Osama Bin Tariq; Mihai Teodor Lazarescu; Luciano Lavagno (UbiComp/ISWC Adjunct, 2019)

Performance and energy-efficient implementation of a smart city application on FPGAs. - Arslan Arif; Felipe A. Barrigon; Francesco Gregoretti; Javed Iqbal 003; Luciano Lavagno; Mihai Teodor Lazarescu; Liang Ma 003; Manuel Palomino; Javier L. L. Segura (J. Real Time Image Process., 2020)

Power-Optimal Mapping of CNN Applications to Cloud-Based Multi-FPGA Platforms. - Junnan Shan; Mihai T. Lazarescu; Jordi Cortadella; Luciano Lavagno; Mario R. Casu (IEEE Trans. Circuits Syst., 2020)

High-Level Annotation of Routing Congestion for Xilinx Vivado HLS Designs. - Osama Bin Tariq; Junnan Shan; Georgios Floros 002; Christos P. Sotiriou; Mario R. Casu; Mihai Teodor Lazarescu; Luciano Lavagno (IEEE Access, 2021)

CNN-on-AWS: Efficient Allocation of Multikernel Applications on Multi-FPGA Platforms. - Junnan Shan; Mihai T. Lazarescu; Jordi Cortadella; Luciano Lavagno; Mario R. Casu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Array-Specific Dataflow Caches for High-Level Synthesis of Memory-Intensive Algorithms on FPGAs. - Giovanni Brignone; M. Usman Jamal; Mihai T. Lazarescu; Luciano Lavagno (IEEE Access, 2022)

FPGA Acceleration of 3GPP Channel Model Emulator for 5G New Radio. - Nasir Ali Shah; Mihai T. Lazarescu; Roberto Quasso; Salvatore Scarpina; Luciano Lavagno (IEEE Access, 2022)

Fast Energy-Optimal Multikernel DNN-Like Application Allocation on Multi-FPGA Platforms. - Junnan Shan; Mihai T. Lazarescu; Jordi Cortadella; Luciano Lavagno; Mario R. Casu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

A DSP shared is a DSP earned: HLS Task-Level Multi-Pumping for High-Performance Low-Resource Designs. - Giovanni Brignone; Mihai T. Lazarescu; Luciano Lavagno (ICCD, 2023)

Enhanced Exploration of Neural Network Models for Indoor Human Monitoring. - Giorgia Subbicini; Luciano Lavagno; Mihai T. Lazarescu (IWASI, 2023)

A Graph Neural Network Model for Fast and Accurate Quality of Result Estimation for High-Level Synthesis. - M. Usman Jamal; Zhuowei Li 006; Mihai T. Lazarescu; Luciano Lavagno (IEEE Access, 2023)

Mix & Latch: An Optimization Flow for High-Performance Designs With Single-Clock Mixed-Polarity Latches and Flip-Flops. - Filippo Minnella; Jordi Cortadella; Mario R. Casu; Mihai T. Lazarescu; Luciano Lavagno (IEEE Access, 2023)

Design and Optimization of Residual Neural Network Accelerators for Low-Power FPGAs Using High-Level Synthesis. - Filippo Minnella; Teodoro Urso; Mihai T. Lazarescu; Luciano Lavagno (CoRR, 2023)

A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architectures. - Fabrizio Ferrandi; Serena Curzel; Leandro Fiorin; Daniele Ielmini; Cristina Silvano; Francesco Conti 001; Alessio Burrello; Francesco Barchi; Luca Benini; Luciano Lavagno; Teodoro Urso; Enrico Calore; et al. (CoRR, 2023)

To Spike or Not to Spike: A Digital Hardware Perspective on Deep Learning Acceleration. - Fabrizio Ottati; Chang Gao 002; Qinyu Chen; Giovanni Brignone; Mario R. Casu; Jason K. Eshraghian; Luciano Lavagno (IEEE J. Emerg. Sel. Topics Circuits Syst., 2023)

LESS: Low-Power Energy-Efficient Subgraph Isomorphism on FPGA. - Roberto Bosio; Giovanni Brignone; Filippo Minnella; M. Usman Jamal; Luciano Lavagno (DATE, 2024)

Comparative Survey of Embedded System Implementations of Convolutional Neural Networks in Autonomous Cars Applications. - Mohammad Cheshfar; Mohammad Hossein Maghami; Parviz Amiri; Hossein Gharaee Garakani; Luciano Lavagno (IEEE Access, 2024)

Mix & Latch: Comparison With State-of-the-Art Retiming on a RISC-V Benchmark. - Lorenzo Lagostina; Filippo Minnella; Jordi Cortadella; Mario R. Casu; Mihai T. Lazarescu; Luciano Lavagno (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Just TestIt! An SBST Approach To Automate System-Integration Testing. - Tommaso Terzano; Luigi Giuffrida; Juan Sapriza; Pasquale Davide Schiavone; Guido Masera; David Atienza; Luciano Lavagno; Maurizio Martina (CF (Companion), 2025)

Automated Hardware Design Methodology for Digital Filters With High-Level Synthesis. - Shehryar Akbar; Luciano Lavagno; Mihai T. Lazarescu; Davide Mariz (IEEE Access, 2025)

Low-Power Subgraph Isomorphism at the Edge Using FPGAs. - Roberto Bosio; Giovanni Brignone; Teodoro Urso; Mihai T. Lazarescu; Luciano Lavagno; Paolo Pasini (IEEE Access, 2025)

NN2FPGA: Optimizing CNN Inference on FPGAs With Binary Integer Programming. - Roberto Bosio; Filippo Minnella; Teodoro Urso; Mario R. Casu; Luciano Lavagno; Mihai T. Lazarescu; Paolo Pasini (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

SILVIA: Automated Superword-Level Parallelism Exploitation via HLS-specific LLVM Passes for Compute-Intensive FPGA Accelerators. - Giovanni Brignone; Roberto Bosio; Fabrizio Ottati; Claudio Sansoè; Luciano Lavagno (ACM Trans. Reconfigurable Technol. Syst., 2025)

A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms. - Cristina Silvano; Daniele Ielmini; Fabrizio Ferrandi; Leandro Fiorin; Serena Curzel; Luca Benini; Francesco Conti 001; Angelo Garofalo; Cristian Zambelli; Enrico Calore; Sebastiano Fabio Schifano; Maurizio Palesi; et al. (ACM Comput. Surv., 2025)