Implementing a User Level Multimedia Transport Protocol in Java. - Ludovic Apvrille; Laurent Dairaine; Patrick Sénac; Luis Rojas-Cardenas; Michel Diaz (ISCC, 2000)

A New UML Profile for Real-Time System Formal Design and Validation. - Ludovic Apvrille; Pierre de Saqui-Sannes; Christophe Lohr; Patrick Sénac; Jean-Pierre Courtiat (UML, 2001)

New Operators for the TURTLE Real-Time UML Profile. - Christophe Lohr; Ludovic Apvrille; Pierre de Saqui-Sannes; Jean-Pierre Courtiat (FMOODS, 2003)

Verifying Service Continuity in a Dynamic Reconfiguration Procedure: Application to a Satellite System. - Ludovic Apvrille; Pierre de Saqui-Sannes; Patrick Sénac; Christophe Lohr (Autom. Softw. Eng., 2004)

TURTLE: A Real-Time UML Profile Supported by a Formal Validation Toolkit. - Ludovic Apvrille; Jean-Pierre Courtiat; Christophe Lohr; Pierre de Saqui-Sannes (IEEE Trans. Software Eng., 2004)

Abstract Application Modeling for System Design Space Exploration. - Muhammad Waseem; Ludovic Apvrille; Rabéa Ameur-Boulifa; Sophie Coudert; Renaud Pacalet (DSD, 2006)

A UML-based Environment for System Design Space Exploration. - Ludovic Apvrille; Muhammad Waseem; Rabéa Ameur-Boulifa; Sophie Coudert; Renaud Pacalet (ICECS, 2006)

Real-Time and Embedded System Verification Based on Formal Requirements. - Benjamin Fontan; Ludovic Apvrille; Pierre de Saqui-Sannes; Jean-Pierre Courtiat (IES, 2006)

Un environnement de conception de systèmes distribués basé sur UML. - Ludovic Apvrille; Pierre de Saqui-Sannes; Renaud Pacalet; Axelle Apvrille (Ann. des Télécommunications, 2006)

TURTLE-P: a UML profile for the formal validation of critical and distributed systems. - Ludovic Apvrille; Pierre de Saqui-Sannes; Ferhat Khendek (Softw. Syst. Model., 2006)

Specifying Fractal and GCM Components with UML. - Solange Ahumada; Ludovic Apvrille; Tomás Barros; Antonio Cansado; Eric Madelaine; Emil Salageanu (SCCC, 2007)

Application Specific Processors for Multimedia Applications. - Muhammad Rashid 001; Ludovic Apvrille; Renaud Pacalet (CSE, 2008)

Synthèse d'observateurs à partir d'exigences temporelles. - Benjamin Fontan; Pierre de Saqui-Sannes; Ludovic Apvrille (LMO, 2008)

TTool for DIPLODOCUS: an environment for design space exploration. - Ludovic Apvrille (NOTERE, 2008)

Adding a methodological assistant to a protocol modeling environment. - Ludovic Apvrille; Pierre de Saqui-Sannes (NOTERE, 2008)

Evaluation of ASIPs Design with LISATek. - Muhammad Rashid 001; Ludovic Apvrille; Renaud Pacalet (SAMOS, 2008)

High-Level System Modeling for Rapid HW/SW Architecture Exploration. - Chafic Jaber; Andreas Kanstein; Ludovic Apvrille; Amer Baghdadi; Patricia Le Moenner; Renaud Pacalet (IEEE International Workshop on Rapid System Prototyping, 2009)

Fast Simulation Techniques for Design Space Exploration. - Daniel Knorreck; Ludovic Apvrille; Renaud Pacalet (TOOLS (47), 2009)

Real-Time Distributed Systems Dimensioning and Validation: The TURTLE Method. - Ludovic Apvrille; Ahlem Mifdaoui; Pierre de Saqui-Sannes (Stud. Inform. Univ., 2010)

AVATAR: A SysML Environment for the Formal Verification of Safety and Security Properties. - Gabriel Pedroza; Ludovic Apvrille; Daniel Knorreck (NOTERE, 2011)

A Formal Methodology Applied to Secure Over-the-Air Automotive Applications. - Gabriel Pedroza; Muhammad Sabir Idrees; Ludovic Apvrille; Yves Roudier (VTC Fall, 2011)

Car2X Communication: Securing the Last Meter - A Cost-Effective Approach for Ensuring Trust in Car2X Applications Using In-Vehicle Symmetric Cryptography. - Hendrik Schweppe; Yves Roudier; Benjamin Weyl; Ludovic Apvrille; Dirk Scheuermann (VTC Fall, 2011)

TEPE: a SysML language for time-constrained property modeling and formal verification. - Daniel Knorreck; Ludovic Apvrille; Pierre de Saqui-Sannes (ACM SIGSOFT Softw. Eng. Notes, 2011)

Un assistant méthodologique UML. Modélisation et vérification formelle de protocoles guidées par des patrons. - Ludovic Apvrille; Pierre de Saqui-Sannes (Tech. Sci. Informatiques, 2011)

Fast Evaluation of Power Consumption of Embedded Systems Using DIPLODOCUS. - Feriel Ben Abdallah; Ludovic Apvrille (EUROMICRO-SEAA, 2013)

Towards the model-driven engineering of security requirements for embedded systems. - Yves Roudier; Muhammad Sabir Idrees; Ludovic Apvrille (MoDRE, 2013)

Static Analysis Techniques to Verify Mutual Exclusion Situations within SysML Models. - Ludovic Apvrille; Pierre de Saqui-Sannes (SDL Forum, 2013)

Formal system-level design space exploration. - Daniel Knorreck; Ludovic Apvrille; Renaud Pacalet (Concurr. Comput. Pract. Exp., 2013)

UAVs for humanitarian missions: Autonomy and reliability. - Tullio Tanzi; Ludovic Apvrille; Jean-Luc Dugelay; Yves Roudier (GHTC, 2014)

Safety properties modelling. - Tullio J. Tanzi; Raoul Textoris; Ludovic Apvrille (HSI, 2014)

A UML Model-Driven Approach to Efficiently Allocate Complex Communication Schemes. - Andrea Enrici; Ludovic Apvrille; Renaud Pacalet (MoDELS, 2014)

Towards the Model-Driven Engineering of Secure yet Safe Embedded Systems. - Ludovic Apvrille; Yves Roudier (GraMSec, 2014)

Model the System from Adversary Viewpoint: Threats Identification and Modeling. - Muhammad Sabir Idrees; Yves Roudier; Ludovic Apvrille (AIDP, 2014)

SysML-Sec Attack Graphs: Compact Representations for Complex Attacks. - Ludovic Apvrille; Yves Roudier (GraMSec@CSF, 2015)

Facial makeup detection technique based on texture and shape analysis. - Neslihan Kose; Ludovic Apvrille; Jean-Luc Dugelay (FG, 2015)

Designing Safe and Secure Embedded and Cyber-Physical Systems with SysML-Sec. - Ludovic Apvrille; Yves Roudier (MODELSWARD (Revised Selected Papers), 2015)

SysML-Sec - A Model Driven Approach for Designing Safe and Secure Systems. - Yves Roudier; Ludovic Apvrille (MODELSWARD, 2015)

Identifying Unknown Android Malware with Feature Extractions and Classification Techniques. - Ludovic Apvrille; Axelle Apvrille (TrustCom/BigDataSE/ISPA (1), 2015)

SherlockDroid: a research assistant to spot unknown malware in Android marketplaces. - Axelle Apvrille; Ludovic Apvrille (J. Comput. Virol. Hacking Tech., 2015)

SysML Models and Model Transformation for Security. - Florian Lugou; Letitia W. Li; Ludovic Apvrille; Rabéa Ameur-Boulifa (MODELSWARD, 2016)

Security Modeling for Embedded System Design. - Letitia W. Li; Florian Lugou; Ludovic Apvrille (GraMSec@CSF, 2017)

Model-Driven Performance Evaluation and Formal Verification for Multi-level Embedded System Design. - Daniela Genius; Letitia W. Li; Ludovic Apvrille (MODELSWARD, 2017)

Formal and Virtual Multi-level Design Space Exploration. - Letitia W. Li; Daniela Genius; Ludovic Apvrille (MODELSWARD (Revised Selected Papers), 2017)

Security-aware Modeling and Analysis for HW/SW Partitioning. - Letitia W. Li; Florian Lugou; Ludovic Apvrille (MODELSWARD, 2017)

System-level design for communication-centric task farm applications. - Daniela Genius; Ludovic Apvrille (ReCoSoC, 2017)

SMASHUP: a toolchain for unified verification of hardware/software co-designs. - Florian Lugou; Ludovic Apvrille; Aurélien Francillon (J. Cryptogr. Eng., 2017)

A Model-Driven Engineering Methodology to Design Parallel and Distributed Embedded Systems. - Andrea Enrici; Ludovic Apvrille; Renaud Pacalet (ACM Trans. Design Autom. Electr. Syst., 2017)

SysML Model Transformation for Safety and Security Analysis. - Rabéa Ameur-Boulifa; Florian Lugou; Ludovic Apvrille (ISSA/CSITS@ESORICS, 2018)

A Model Compilation Approach for Optimized Implementations of Signal-processing Systems. - Andrea Enrici; Julien Lallet; Imran Latif; Ludovic Apvrille; Renaud Pacalet; Adrien Canuel (MODELSWARD, 2018)

Model-Based Programming for Multi-processor Platforms with TTool/DIPLODOCUS and OMC. - Andrea Enrici; Julien Lallet; Renaud Pacalet; Ludovic Apvrille; Karol Desnos; Imran Latif (MODELSWARD (Revised Selected Papers), 2018)

Multi-level Latency Evaluation with an MDE Approach. - Daniela Genius; Letitia W. Li; Ludovic Apvrille; Tullio Tanzi (MODELSWARD, 2018)

Evolving Attacker Perspectives for Secure Embedded System Design. - Letitia W. Li; Florian Lugou; Ludovic Apvrille (MODELSWARD, 2018)

System-Level Design and Virtual Prototyping of a Telecommunication Application on a NUMA Platform. - Daniela Genius; Ludovic Apvrille (ReCoSoC, 2018)

A Language-Based Multi-View Approach for Combining Functional and Security Models. - Hui Zhao 016; Frédéric Mallet; Ludovic Apvrille (APSEC, 2019)

Harmonizing Safety, Security and Performance Requirements in Embedded Systems. - Ludovic Apvrille; Letitia W. Li (DATE, 2019)

Odyn: Deadlock Prevention and Hybrid Scheduling Algorithm for Real-Time Dataflow Applications. - Benjamin Dauphin; Renaud Pacalet; Andrea Enrici; Ludovic Apvrille (DSD, 2019)

Optimizing System Architecture Cost and Security Countermeasures. - Sahar Berro; Ludovic Apvrille; Guillaume Duc (GraMSec@CSF, 2019)

Modeling the Trade-off Between Security and Performance to Support the Product Life Cycle. - Radek Fujdiak; Petr Blazek; Ludovic Apvrille; Zdenek Martinasek; Petr Mlynek; Renaud Pacalet; David Smekal; Pavel Mrnustik; Maros Barabas; Maysam Zoor (MECO, 2019)

Efficient Data-Flow Analysis of UML/SysML Diagrams for Optimized Model Compilation of Hardware-software Systems. - Andrea Enrici; Ludovic Apvrille; Renaud Pacalet (MODELSWARD, 2019)

Static Data-Flow Analysis of UML/SysML Functional Views for Signal and Image Processing Applications. - Andrea Enrici; Ludovic Apvrille; Renaud Pacalet; Minh Hiep Pham (MODELSWARD (Revised Selected Papers), 2019)

A Tool for High-level Modeling of Analog/Mixed Signal Embedded Systems. - Daniela Genius; Rodrigo Cortés Porto; Ludovic Apvrille; François Pêcheux (MODELSWARD, 2019)

A Framework for Multi-level Modeling of Analog/Mixed Signal Embedded Systems. - Daniela Genius; Rodrigo Cortés Porto; Ludovic Apvrille; François Pêcheux (MODELSWARD (Revised Selected Papers), 2019)

Meta-models Combination for Reusing Verification Techniques. - Hui Zhao 016; Ludovic Apvrille; Frédéric Mallet (MODELSWARD, 2019)

A Model-Based Combination Language for Scheduling Verification. - Hui Zhao 016; Ludovic Apvrille; Frédéric Mallet (MODELSWARD (Revised Selected Papers), 2019)

Modeling and Virtual Prototyping for Embedded Systems on Mixed-Signal Multicores. - Rodrigo Cortés Porto; Daniela Genius; Ludovic Apvrille (RAPIDO, 2019)

Test Sequence Generation From Formally Verified SysML Models. - Pierre de Saqui-Sannes; Ludovic Apvrille (Software Engineering (Workshops), 2019)

High-level modeling of communication-centric applications: Extensions to a system-level design and virtual prototyping tool. - Daniela Genius; Ludovic Apvrille; Letitia W. Li (Microprocess. Microsystems, 2019)

Efficient Scheduling of FPGAs for Cloud Data Center Infrastructures. - Matteo Bertolino; Renaud Pacalet; Ludovic Apvrille; Andrea Enrici (DSD, 2020)

Efficient and Exact Design Space Exploration for Heterogeneous and Multi-Bus Platforms. - Amna Gharbi; Andrea Enrici; Bogdan Uscumlic; Ludovic Apvrille; Renaud Pacalet (DSD, 2020)

Design Space Exploration with Deterministic Latency Guarantees for Crossbar MPSoC Architectures. - Bogdan Uscumlic; Andrea Enrici; Renaud Pacalet; Amna Gharbi; Ludovic Apvrille; Lionel Natarianni; Laurent Roullet (ICC, 2020)

SysML models: studying safety and security measures impact on performance using graph tainting. - Maysam Zoor; Ludovic Apvrille; Renaud Pacalet (MoDELS (Companion), 2020)

High-level Partitioning and Design Space Exploration for Cyber Physical Systems. - Daniela Genius; Ilias Bournias; Ludovic Apvrille; Roselyne Chotin (MODELSWARD, 2020)

Model-Based Virtual Prototyping of CPS: Application to Bio-Medical Devices. - Daniela Genius; Ilias Bournias; Ludovic Apvrille; Roselyne Chotin (MODELSWARD (Revised Selected Papers), 2020)

Impact of Security Measures on Performance Aspects in SysML Models. - Maysam Zoor; Ludovic Apvrille; Renaud Pacalet (MODELSWARD, 2020)

Combining STPA with SysML Modeling. - Fellipe Guilherme Rey de Souza; Juliana de Melo Bezerra; Celso Massaki Hirata; Pierre de Saqui-Sannes; Ludovic Apvrille (SysCon, 2020)

Execution Trace Analysis for a Precise Understanding of Latency Violations. - Maysam Zoor; Ludovic Apvrille; Renaud Pacalet (MoDELS, 2021)

Direct Model-checking of SysML Models. - Alessandro Tempia Calvino; Ludovic Apvrille (MODELSWARD, 2021)

Interfacing Digital and Analog Models for Fast Simulation and Virtual Prototyping. - Daniela Genius; Ludovic Apvrille (MODELSWARD, 2021)

Handling causality and schedulability when designing and prototyping cyber-physical systems. - Rodrigo Cortés Porto; Daniela Genius; Ludovic Apvrille (Softw. Syst. Model., 2021)

Multi-resource scheduling for FPGA systems. - Matteo Bertolino; Renaud Pacalet; Ludovic Apvrille; Andrea Enrici (Microprocess. Microsystems, 2021)

Checking SysML Models Against Safety and Security Properties. - Pierre de Saqui-Sannes; Ludovic Apvrille; Rob A. Vingerhoeds (J. Aerosp. Inf. Syst., 2021)

SysML Models Verification Relying on Dependency Graphs. - Ludovic Apvrille; Pierre de Saqui-Sannes; Oana Hotescu; Alessandro Tempia Calvino (MODELSWARD, 2022)

Dependency Graphs to Boost the Verification of SysML Models. - Ludovic Apvrille; Pierre de Saqui-Sannes; Oana Hotescu; Alessandro Tempia Calvino (MODELSWARD (Revised Selected Papers), 2022)

Safety, Security and Performance Assessment of Security Countermeasures with SysML-Sec. - Bastien Sultan; Ludovic Apvrille; Philippe Jaillon (MODELSWARD, 2022)

W-Sec: A Model-Based Formal Method for Assessing the Impacts of Security Countermeasures. - Bastien Sultan; Ludovic Apvrille; Philippe Jaillon; Sophie Coudert (MODELSWARD (Revised Selected Papers), 2022)

Introducing A Framework for Single-Human Tracking Using Event-Based Cameras. - Dominik Eisl; Fabian Herzog; Jean-Luc Dugelay; Ludovic Apvrille; Gerhard Rigoll (ICIP, 2023)

Integration of Heterogeneous Components for Co-Simulation. - Jawher Jerray; Rabéa Ameur-Boulifa; Ludovic Apvrille (ICSOFT, 2023)

Mutation of Formally Verified SysML Models. - Ludovic Apvrille; Bastien Sultan; Oana Hotescu; Pierre de Saqui-Sannes; Sophie Coudert (MODELSWARD, 2023)

Hierarchical Design of Cyber-Physical Systems. - Daniela Genius; Ludovic Apvrille (MODELSWARD, 2023)

A Hierarchical Design Tool for SystemC AMS. - Daniela Genius; Ludovic Apvrille (MODELSWARD (Revised Selected Papers), 2023)

Execution trace analysis for a precise understanding of latency violations. - Maysam Zoor; Ludovic Apvrille; Renaud Pacalet; Sophie Coudert (Softw. Syst. Model., 2023)

Automated Attack Tree Generation Using Artificial Intelligence and Natural Language Processing. - Alan Birchler De Allende; Bastien Sultan; Ludovic Apvrille (CRiSIS, 2024)

From Attack Trees to Attack-Defense Trees with Generative AI & Natural Language Processing. - Alan Birchler De Allende; Bastien Sultan; Ludovic Apvrille (MoDELS (Companion), 2024)

AI-Driven Consistency of SysML Diagrams. - Bastien Sultan; Ludovic Apvrille (MODELS, 2024)

System Architects Are not Alone Anymore: Automatic System Modeling with AI. - Ludovic Apvrille; Bastien Sultan (MODELSWARD, 2024)

Cycle-Accurate Virtual Prototyping with Multiplicity. - Daniela Genius; Ludovic Apvrille (MODELSWARD, 2024)

Incremental and Formal Verification of SysML Models. - Sophie Coudert; Ludovic Apvrille; Bastien Sultan; Oana Hotescu; Pierre de Saqui-Sannes (SN Comput. Sci., 2024)

Evaluating KASLR Break on RISC-V Using Gem5: Microarchitectural Side-Channel Analysis of Page-Table Walks. - Mahreen Khan; Maria Mushtaq; Renaud Pacalet; Ludovic Apvrille (EICC, 2025)

Enabling Incremental SysML Model Verification: Managing Variability and Complexity Through Tagging and Model Reduction. - Bastien Sultan; Ludovic Apvrille; Oana Hotescu; Pierre de Saqui-Sannes (MODELSWARD, 2025)

Assessing Security RISC: Analyzing Flush+Fault Attack on RISC-V Using gem5 Simulator. - Mahreen Khan; Maria Mushtaq; Renaud Pacalet; Ludovic Apvrille (SECRYPT, 2025)

AMULET: A Mutation Language Enabling Automatic Enrichment of SysML Models. - Bastien Sultan; Leon Frenot; Ludovic Apvrille; Philippe Jaillon; Sophie Coudert (ACM Trans. Embed. Comput. Syst., 2025)