A study of a suboptimal VLSI architecture for joint source-channel trellis coding. - Luis Fernando González Pérez; Emmanuel Boutillon (ISCAS, 2000)

Power Consumption Management on FPGAs. - Andrés David García García; Luis Fernando González Pérez; Reynaldo Félix Acuña (CONIELECOMP, 2005)

Hardware Architecture of MAP Algorithm for Turbo Codes Implemented in a FPGA. - Roberto Ramírez Marín; Andrés David García García; Luis Fernando González Pérez; Javier Eduardo González Villarruel (CONIELECOMP, 2005)

VLSI Architecture for the M Algorithm Suited for Detection and Source Coding Applications. - Luis Fernando González Pérez; Emmanuel Boutillon; Andrés David García García; Javier Eduardo González Villarruel; Reynaldo Félix Acuña (CONIELECOMP, 2005)

Performance Study of Space-Time Communications Systems Based on the VBLAST Algorithm. - Karina Sosa; Luis Fernando González Pérez; Miguel Bazdresch; Jorgue Rodriguez-Guisantes (CONIELECOMP, 2005)

Improving Least-Squares-Based VBLAST Architecture with Conventional Channel Coding. - Karina Sosa; Luis Fernando González Pérez; Miguel Bazdresch; Jorgue Rodriguez-Guisantes (CONIELECOMP, 2006)

Analysis of Parallel Sorting Algorithms in K-best Sphere-Decoder Architectures for MIMO Systems. - Pedro Cervantes Lozano; Luis Fernando González Pérez; Andrés David García García (ReConFig, 2011)

Design and Implementation of a Simplified Turbo Decoder for 3GPP2. - Lennin C. Yllescas-Calderon; Adrian J. Espino-Orozco; Ramón Parra-Michel; Luis Fernando González Pérez (ReConFig, 2011)

A VLSI architecture for the K-best Sphere-Decoder in MIMO systems. - Pedro Cervantes Lozano; Luis Fernando González Pérez; Andrés David García García (ReConFig, 2012)

A VLSI architecture for the QR decomposition based on the MCGR algorithm. - Pedro Cervantes Lozano; Luis Fernando González Pérez; Andrés David García García (ReConFig, 2013)