Analysis of the influence of intermittent faults in a microcontroller. - Joaquin Gracia; Luis J. Saiz; Juan Carlos Baraza; Daniel Gil; Pedro J. Gil (DDECS, 2008)

Injecting intermittent faults for the dependability validation of commercial microcontrollers. - Daniel Gil; Luis J. Saiz; Joaquin Gracia; Juan Carlos Baraza; Pedro J. Gil (HLDVT, 2008)

Experimental validation of a fault tolerant microcomputer system against intermittent faults. - Joaquin Gracia-Moran; Daniel Gil-Tomas; Luis J. Saiz-Adalid; Juan Carlos Baraza; Pedro J. Gil-Vicente (DSN, 2010)

Searching Representative and Low Cost Fault Models for Intermittent Faults in Microcontrollers: A Case Study. - Joaquin Gracia-Moran; Daniel Gil-Tomas; Juan Carlos Baraza; Luis J. Saiz-Adalid; Pedro J. Gil-Vicente (PRDC, 2010)

Analyzing the Impact of Intermittent Faults on Microprocessors Applying Fault Injection. - Daniel Gil-Tomas; Joaquin Gracia-Moran; Juan-Carlos Baraza-Calvo; Luis J. Saiz-Adalid; Pedro J. Gil-Vicente (IEEE Des. Test, 2012)

Studying the effects of intermittent faults on a microcontroller. - Daniel Gil-Tomas; Joaquin Gracia-Moran; Juan-Carlos Baraza-Calvo; Luis J. Saiz-Adalid; Pedro J. Gil-Vicente (Microelectron. Reliab., 2012)

Using Interleaving to Avoid the Effects of Multiple Adjacent Faults in On-Chip Interconnection Lines. - Luis J. Saiz-Adalid; Pedro J. Gil; Joaquin Gracia-Moran; Juan-Carlos Baraza-Calvo (EWDC, 2013)

Defining a Representative and Low Cost Fault Model Set for Intermittent Faults in Microprocessor Buses. - Joaquin Gracia-Moran; Daniel Gil-Tomas; Luis J. Saiz-Adalid; Juan-Carlos Baraza-Calvo; Pedro J. Gil-Vicente (LADC, 2013)

Flexible Unequal Error Control Codes with Selectable Error Detection and Correction Levels. - Luis J. Saiz-Adalid; Pedro J. Gil-Vicente; Juan-Carlos Ruiz-Garcia 001; Daniel Gil-Tomas; Juan Carlos Baraza; Joaquin Gracia-Moran (SAFECOMP, 2013)

Modified Hamming Codes to Enhance Short Burst Error Detection in Semiconductor Memories (Short Paper). - Luis J. Saiz-Adalid; Pedro J. Gil; Juan-Carlos Baraza-Calvo; Juan-Carlos Ruiz-Garcia 001; Daniel Gil-Tomas; Joaquin Gracia-Moran (EDCC, 2014)

Effects of Intermittent Faults on the Reliability of a Reduced Instruction Set Computing (RISC) Microprocessor. - Joaquin Gracia-Moran; Juan-Carlos Baraza-Calvo; Daniel Gil-Tomas; Luis J. Saiz-Adalid; Pedro J. Gil-Vicente (IEEE Trans. Reliab., 2014)

Ultrafast Single Error Correction Codes for Protecting Processor Registers. - Luis J. Saiz-Adalid; Pedro J. Gil; Joaquin Gracia-Moran; Daniel Gil-Tomas; Juan-Carlos Baraza-Calvo (EDCC, 2015)

MCU Tolerance in SRAMs Through Low-Redundancy Triple Adjacent Error Correction. - Luis J. Saiz-Adalid; Pedro Reviriego; Pedro J. Gil; Salvatore Pontarelli; Juan Antonio Maestro (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Ultrafast Error Correction Codes for Double Error Detection/Correction. - Luis J. Saiz-Adalid; Pedro J. Gil; Juan Carlos Ruiz 001; Joaquin Gracia-Moran; Daniel Gil-Tomas; Juan-Carlos Baraza-Calvo (EDCC, 2016)

Injecting Intermittent Faults for the Dependability Assessment of a Fault-Tolerant Microcomputer System. - Daniel Gil-Tomas; Joaquin Gracia-Moran; Juan-Carlos Baraza-Calvo; Luis J. Saiz-Adalid; Pedro J. Gil-Vicente (IEEE Trans. Reliab., 2016)

Correction of Adjacent Errors with Low Redundant Matrix Error Correction Codes. - Joaquin Gracia-Moran; Luis J. Saiz-Adalid; Juan-Carlos Baraza-Calvo; Pedro J. Gil (LADC, 2018)

Improving Error Correction Codes for Multiple-Cell Upsets in Space Applications. - Joaquin Gracia-Moran; Luis J. Saiz-Adalid; Daniel Gil-Tomas; Pedro J. Gil-Vicente (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Ultrafast Codes for Multiple Adjacent Error Correction and Double Error Detection. - Luis J. Saiz-Adalid; Joaquin Gracia-Moran; Daniel Gil-Tomas; Juan-Carlos Baraza-Calvo; Pedro J. Gil-Vicente (IEEE Access, 2019)

Zero-Space In-Weight and In-Bias Protection for Floating-Point-based CNNs. - Juan Carlos Ruiz 001; David de Andrés; Luis J. Saiz-Adalid; Joaquin Gracia-Moran (EDCC, 2024)

Allocating ECC parity bits into BF16-encoded CNN parameters: A practical experience report. - Joaquin Gracia-Moran; Juan Carlos Ruiz 001; David de Andrés; Luis J. Saiz-Adalid (LADC, 2024)

In-Memory Zero-Space Floating-Point-Based CNN Protection Using Non-significant and Invariant Bits. - Juan Carlos Ruiz 001; David de Andrés; Luis J. Saiz-Adalid; Joaquin Gracia-Moran (SAFECOMP, 2024)

A Hybrid Technique Based on ECC and Hardened Cells for Tolerating Random Multiple-Bit Upsets in SRAM Arrays. - Daniel Gil-Tomas; Luis J. Saiz-Adalid; Joaquin Gracia-Moran; Juan-Carlos Baraza-Calvo; Pedro J. Gil-Vicente (IEEE Access, 2024)