A Constructive Method for Exploiting Code Motion. - Luiz C. V. dos Santos; Marc J. M. Heijligers; C. A. J. van Eijk; Jos T. J. van Eijndhoven; Jochen A. G. Jess (ISSS, 1996)

A Reordering Technique for Efficient Code Motion. - Luiz C. V. dos Santos; Jochen A. G. Jess (DAC, 1999)

Exploiting State Equivalence on the Fly while Applying Code Motion and Speculation. - Luiz C. V. dos Santos; Jochen A. G. Jess (DATE, 1999)

A code-motion pruning technique for global scheduling. - Luiz C. V. dos Santos; Marc J. M. Heijligers; C. A. J. van Eijk; J. Van Eijnhoven; Jochen A. G. Jess (ACM Trans. Design Autom. Electr. Syst., 2000)

Global scheduling and register allocation based on predicated execution. - Rogério Xavier de Azambuja; Luiz C. V. dos Santos (ISCAS (3), 2003)

Automatic ADL-Based Assembler Generation for ASIP Programming Support. - Leonardo Taglietti; José O. Carlomagno Filho; Daniel C. Casarotto; Olinto J. V. Furtado; Luiz C. V. dos Santos (SAMOS, 2005)

A multi-model power estimation engine for accuracy optimization. - Felipe Klein; Guido Araujo; Rodolfo Azevedo; Roberto Leao; Luiz C. V. dos Santos (ISLPED, 2007)

Automatic Retargeting of Binary Utilities for Embedded Code Generation. - Alexandro Baldassin; Paulo Centoducatte; Sandro Rigo; Daniel C. Casarotto; Luiz C. V. dos Santos; Max R. de O. Schultz; Olinto J. V. Furtado (ISVLSI, 2007)

On the Limitations of Power Macromodeling Techniques. - Felipe Klein; Guido Araujo; Rodolfo Azevedo; Roberto Leao; Luiz C. V. dos Santos (ISVLSI, 2007)

An Object-Oriented Framework for Improving Software Reuse on Automated Testing of Mobile Phones. - Luiz Kawakami; André Knabben; Douglas Rechia; Denise Gasques Bastos; Otavio Pereira; Ricardo Pereira e Silva; Luiz C. V. dos Santos (TestCom/FATES, 2007)

An Automatically-Retargetable Time-Constraint-Driven Instruction Scheduler for Post-compiling Optimization of Embedded Code. - José O. Carlomagno Filho; Luiz F. P. Santos; Luiz C. V. dos Santos (SAMOS, 2007)

A Model-Driven Automatically-Retargetable Debug Tool for Embedded Systems. - Max R. de O. Schultz; Alexandre Keunecke Ignácio Mendonça; Felipe G. Carvalho; Olinto J. V. Furtado; Luiz C. V. dos Santos (SAMOS, 2007)

An open-source binary utility generator. - Alexandro Baldassin; Paulo Centoducatte; Sandro Rigo; Daniel C. Casarotto; Luiz C. V. dos Santos; Max R. de O. Schultz; Olinto J. V. Furtado (ACM Trans. Design Autom. Electr. Syst., 2008)

A novel verification technique to uncover out-of-order DUV behaviors. - Gabriel Marcilio; Luiz C. V. dos Santos; Bruno C. Albertini; Sandro Rigo (DAC, 2009)

Mapping Data and Code into Scratchpads from Relocatable Binaries. - Alexandre Keunecke Ignácio Mendonça; Daniel P. Volpato; José Luís Almada Güntzel; Luiz C. V. dos Santos (ISVLSI, 2009)

An early real-time checker for retargetable compile-time analysis. - Emilio Wuerges; Luiz C. V. dos Santos; Olinto J. V. Furtado; Sandro Rigo (SBCCI, 2009)

A Multi-Model Engine for High-Level Power Estimation Accuracy Optimization. - Felipe Klein; Roberto Leao; Guido Araujo; Luiz C. V. dos Santos; Rodolfo Azevedo (IEEE Trans. Very Large Scale Integr. Syst., 2009)

A Post-compiling Approach that Exploits Code Granularity in Scratchpads to Improve Energy Efficiency. - Daniel P. Volpato; Alexandre Keunecke Ignácio Mendonça; Luiz C. V. dos Santos; José Luís Almada Güntzel (ISVLSI, 2010)

Automatic generation of memory consistency tests for chip multiprocessing. - Eberle A. Rambo; Olav P. Henschel; Luiz C. V. dos Santos (ICECS, 2011)

Fast estimation of memory consumption for energy-efficient compilers. - Emilio Wuerges; Rômulo Silva de Oliveira; Luiz C. V. dos Santos (ICECS, 2011)

Cache-tuning-aware scratchpad allocation from binaries. - Daniel P. Volpato; Alexandre Keunecke Ignácio Mendonça; José Luís Almada Güntzel; Luiz Cláudio Villar dos Santos (SBCCI, 2011)

On ESL verification of memory consistency for system-on-chip multiprocessing. - Eberle A. Rambo; Olav P. Henschel; Luiz C. V. dos Santos (DATE, 2012)

Efficient verification of out-of-order behaviors with relaxed scoreboards. - Leandro S. Freitas; Gabriel A. G. Andrade; Luiz C. V. dos Santos (ICCD, 2012)

A template for the construction of efficient checkers with full verification guarantees. - Leandro S. Freitas; Gabriel A. G. Andrade; Luiz C. V. dos Santos (ICECS, 2012)

Energy-efficient multi-task computing on MPSoCs: A case study from a memory perspective. - Rafael Westphal; José Luís Almada Güntzel; Luiz Cláudio Villar dos Santos (ICECS, 2012)

Reconciling real-time guarantees and energy efficiency through unlocked-cache prefetching. - Emilio Wuerges; Rômulo Silva de Oliveira; Luiz C. V. dos Santos (DAC, 2013)

On-the-fly verification of memory consistency with concurrent relaxed scoreboards. - Leandro S. Freitas; Eberle A. Rambo; Luiz C. V. dos Santos (DATE, 2013)

Pre-silicon verification of multiprocessor SoCs: The case for on-the-fly coherence/consistency checking. - Olav P. Henschel; Luiz C. V. dos Santos (ICECS, 2013)

Exploiting Non-Critical Steiner Tree Branches for Post-Placement Timing Optimization. - Vinicius S. Livramento; Chrystian Guth; Renan Netto; José Luís Almada Güntzel; Luiz C. V. dos Santos (ICCAD, 2015)

Timing-Driven Placement Based on Dynamic Net-Weighting for Efficient Slack Histogram Compression. - Chrystian Guth; Vinicius S. Livramento; Renan Netto; Renan Fonseca; José Luís Güntzel; Luiz C. V. dos Santos (ISPD, 2015)

Chain-based pseudorandom tests for pre-silicon verification of CMP memory systems. - Gabriel A. G. Andrade; Marleson Graf; Luiz C. V. dos Santos (ICCD, 2016)

Speeding up Incremental Legalization with Fast Queries to Multidimensional Trees. - Renan Netto; Vinicius S. Livramento; Chrystian Guth; Luiz C. V. dos Santos; José Luís Güntzel (ISVLSI, 2016)

Evaluating the impact of circuit legalization on incremental optimization techniques. - Renan Netto; Vinicius S. Livramento; Chrystian Guth; Luiz C. V. dos Santos; José Luís Güntzel (SBCCI, 2016)

Cache sizing for low-energy Elliptic Curve Cryptography. - Felipe Piovezan; Tarcisio E. M. Crocomo; Luiz C. V. dos Santos (SBCCI, 2016)

Clock-Tree-Aware Incremental Timing-Driven Placement. - Vinicius S. Livramento; Renan Netto; Chrystian Guth; José Luís Güntzel; Luiz Cláudio Villar dos Santos (ACM Trans. Design Autom. Electr. Syst., 2016)

Incremental Layer Assignment Driven by an External Signoff Timing Engine. - Vinicius S. Livramento; Derong Liu 002; Salim Chowdhury; Bei Yu 001; Xiaoqing Xu; David Z. Pan; José Luís Almada Güntzel; Luiz C. V. dos Santos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Steep coverage-ascent directed test generation for shared-memory verification of multicore chips. - Gabriel A. G. Andrade; Marleson Graf; Nícolas Pfeifer; Luiz C. V. dos Santos (ICCAD, 2018)

Spec&Check: An Approach to the Building of Shared-Memory Runtime Checkers for Multicore Chip Design Verification. - Marleson Graf; Olav P. Henschel; Rafael P. Alevato; Luiz C. V. dos Santos (ICCAD, 2019)

A Reinforcement Learning Approach to Directed Test Generation for Shared Memory Verification. - Nícolas Pfeifer; Bruno V. Zimpel; Gabriel A. G. Andrade; Luiz C. V. dos Santos (DATE, 2020)

A Directed Test Generator for Shared-Memory Verification of Multicore Chip Designs. - Gabriel A. G. Andrade; Marleson Graf; Nícolas Pfeifer; Luiz C. V. dos Santos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Chaining and Biasing: Test Generation Techniques for Shared-Memory Verification. - Gabriel A. G. Andrade; Marleson Graf; Luiz C. V. dos Santos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

EveCheck: An Event-Driven, Scalable Algorithm for Coherent Shared Memory Verification. - Marleson Graf; Gabriel A. G. Andrade; Luiz C. V. dos Santos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)