Customizing a VLIW-SIMD application-specific instruction-set processor for hearing aid devices. - Julian Hartig; Lukas Gerlach 001; Guillermo Payá-Vayá; Holger Blume (SiPS, 2014)

FLINT: layout-oriented FPGA-based methodology for fault tolerant ASIC design. - Rochus Nowosielski; Lukas Gerlach 001; Stephan Bieband; Guillermo Payá-Vayá; Holger Blume (DATE, 2015)

An area efficient real- and complex-valued multiply-accumulate SIMD unit for digital signal processors. - Lukas Gerlach 001; Guillermo Payá-Vayá; Holger Blume (SiPS, 2015)

Efficient Emulation of Floating-Point Arithmetic on Fixed-Point SIMD Processors. - Lukas Gerlach 001; Guillermo Payá-Vayá; Holger Blume (SiPS, 2016)

Real-time implementation of a GMM-based binaural localization algorithm on a VLIW-SIMD processor. - Christopher Seifert; Joachim Thiemann; Lukas Gerlach 001; Tobias Volkmar; Guillermo Payá-Vayá; Holger Blume; Steven van de Par (ICME, 2017)

Analyzing the trade-off between power consumption and beamforming algorithm performance using a hearing aid ASIP. - Lukas Gerlach 001; Guillermo Payá-Vayá; Shuang Liu; Moritz Weißbrich; Holger Blume; Daniel Marquardt; Simon Doclo (SAMOS, 2017)

Using a genetic algorithm approach to reduce register file pressure during instruction scheduling. - Florian Giesemann; Guillermo Payá-Vayá; Lukas Gerlach 001; Holger Blume; Fabian Pflug; Gabriele von Voigt (SAMOS, 2017)

KAVUAKA: A Low Power Application Specific Hearing Aid Processor. - Lukas Gerlach 001; Guillermo Payá-Vayá; Holger Blume (VLSI-SoC, 2019)

FLINT+: A runtime-configurable emulation-based stochastic timing analysis framework. - Moritz Weißbrich; Lukas Gerlach 001; Holger Blume; Ardalan Najafi; Alberto García Ortiz; Guillermo Payá-Vayá (Integr., 2019)

DNN-based performance measures for predicting error rates in automatic speech recognition and optimizing hearing aid parameters. - Angel Mario Castro Martinez; Lukas Gerlach 001; Guillermo Payá-Vayá; Hynek Hermansky; Jasper Ooster; Bernd T. Meyer (Speech Commun., 2019)

Issue-Slot Based Predication Encoding Technique for VLIW Processors. - Lukas Gerlach 001; Fabian Stuckmann; Holger Blume; Guillermo Payá-Vayá (MOCAST, 2020)

Design Space Exploration Framework for Tensilica-Based Digital Audio Processors in Hearing Aids. - Jens Karrenbauer; Lukas Gerlach 001; Guillermo Payá-Vayá; Holger Blume (MOCAST, 2020)

Evolutionary Algorithms for Instruction Scheduling, Operation Merging, and Register Allocation in VLIW Compilers. - Florian Giesemann; Lukas Gerlach 001; Guillermo Payá-Vayá (J. Signal Process. Syst., 2020)

KAVUAKA: A Low-Power Application-Specific Processor Architecture for Digital Hearing Aids. - Lukas Gerlach 001 (2021)

SmartHeaP - A High-level Programmable, Low Power, and Mixed-Signal Hearing Aid SoC in 22nm FD-SOI. - Jens Karrenbauer; Simon C. Klein; Sven Schönewald; Lukas Gerlach 001; Meinolf Blawat; Jens Benndorf; Holger Blume (ESSCIRC, 2022)

A Survey on Application Specific Processor Architectures for Digital Hearing Aids. - Lukas Gerlach 001; Guillermo Payá-Vayá; Holger Blume (J. Signal Process. Syst., 2022)

A Rowhammer Reproduction Study Using the Blacksmith Fuzzer. - Lukas Gerlach 001; Fabian Thomas; Robert Pietsch; Michael Schwarz 001 (ESORICS (3), 2023)

Indirect Meltdown: Building Novel Side-Channel Attacks from Transient-Execution Attacks. - Daniel Weber 007; Fabian Thomas; Lukas Gerlach 001; Ruiyi Zhang 001; Michael Schwarz 001 (ESORICS (3), 2023)

Reviving Meltdown 3a. - Daniel Weber 007; Fabian Thomas; Lukas Gerlach 001; Ruiyi Zhang 001; Michael Schwarz 001 (ESORICS (3), 2023)

A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs. - Lukas Gerlach 001; Daniel Weber 007; Ruiyi Zhang 001; Michael Schwarz 001 (SP, 2023)

Collide+Power: Leaking Inaccessible Data with Software-based Power Side Channels. - Andreas Kogler; Jonas Juffinger; Lukas Giner; Lukas Gerlach 001; Martin Schwarzl; Michael Schwarz 001; Daniel Gruss; Stefan Mangard (USENIX Security Symposium, 2023)

No Leakage Without State Change: Repurposing Configurable CPU Exceptions to Prevent Microarchitectural Attacks. - Daniel Weber 007; Leonard Niemann; Lukas Gerlach 001; Jan Reineke 001; Michael Schwarz 001 (ACSAC, 2024)

Efficient and Generic Microarchitectural Hash-Function Recovery. - Lukas Gerlach 001; Simon Schwarz; Nicolas Faroß; Michael Schwarz 001 (SP, 2024)

CacheWarp: Software-based Fault Injection using Selective State Reset. - Ruiyi Zhang 001; Lukas Gerlach 001; Daniel Weber 007; Lorenz Hetterich; Youheng Lü; Andreas Kogler; Michael Schwarz 001 (USENIX Security Symposium, 2024)

ShadowLoad: Injecting State into Hardware Prefetchers. - Lorenz Hetterich; Fabian Thomas; Lukas Gerlach 001; Ruiyi Zhang 001; Nils Bernsdorf; Eduard Ebert; Michael Schwarz 001 (ASPLOS (2), 2025)

Taming the Linux Memory Allocator for Rapid Prototyping. - Ruiyi Zhang 001; Tristan Hornetz; Lukas Gerlach 001; Michael Schwarz 001 (DIMVA (2), 2025)

Cascading Spy Sheets: Exploiting the Complexity of Modern CSS for Email and Browser Fingerprinting. - Leon Trampert; Daniel Weber 007; Lukas Gerlach 001; Christian Rossow; Michael Schwarz 001 (NDSS, 2025)

Rapid Reversing of Non-Linear CPU Cache Slice Functions: Unlocking Physical Address Leakage. - Mikka Rainer; Lorenz Hetterich; Fabian Thomas; Tristan Hornetz; Leon Trampert; Lukas Gerlach 001; Michael Schwarz 001 (SP, 2025)

Peripheral Instinct: How External Devices Breach Browser Sandboxes. - Leon Trampert; Lorenz Hetterich; Lukas Gerlach 001; Mona Schappert; Christian Rossow; Michael Schwarz 001 (WWW, 2025)