Hardware Accelerated Scheduling in Real-Time Systems. - Lukás Kohútka; Martin Vojtko; Tibor Krajcovic (ECBS-EERC, 2015)

Improved Task Scheduler for Dual-Core Real-Time Systems. - Lukás Kohútka; Viera Stopjaková (DSD, 2016)

Task scheduler for dual-core real-time systems. - Lukás Kohútka; Viera Stopjaková (MIXDES, 2016)

Rocket Queue: New data sorting architecture for real-time systems. - Lukás Kohútka; Viera Stopjaková (DDECS, 2017)

A new efficient sorting architecture for real-time systems. - Lukás Kohútka; Viera Stopjaková (MECO, 2017)

Heap Queue: A Novel Efficient Hardware Architecture of MIN/MAX Queues for Real-Time Systems. - Lukás Kohútka; Viera Stopjaková (DDECS, 2018)

A Novel Hardware-Accelerated Priority Queue for Real-Time Systems. - Lukás Kohútka; Lukás Nagy; Viera Stopjaková (DSD, 2018)

A novel hardware-accelerated real-time task scheduler based on robust earliest deadline algorithm. - Lukás Kohútka; Viera Stopjaková (DTIS, 2018)

Reliable real-time task scheduler based on Rocket Queue architecture. - Lukás Kohútka; Viera Stopjaková (Microelectron. Reliab., 2018)

Low Latency Hardware-Accelerated Dynamic Memory Manager for Hard Real-Time and Mixed-Criticality Systems. - Lukás Kohútka; Lukás Nagy; Viera Stopjaková (DDECS, 2019)

A New Hardware-Accelerated Scheduler for Soft Real-Time Tasks. - Lukás Kohútka; Viera Stopjaková (MECO, 2019)

A Novel On-Chip Task Scheduler for Mixed-Criticality Real-Time Systems. - Lukás Kohútka; Lukás Nagy; Viera Stopjaková (J. Circuits Syst. Comput., 2019)

RED-based Scheduler on Chip for Mixed-Criticality Real-Time Systems. - Lukás Kohútka; Lukás Nagy; Viera Stopjaková (MECO, 2020)

ASIC Architecture and Implementation of RED Scheduler for Mixed-Criticality Real-Time Systems. - Lukás Kohútka; Viera Stopjaková (MIXDES, 2020)

Novel efficient on-chip task scheduler for multi-core hard real-time systems. - Lukás Kohútka; Viera Stopjaková (Microprocess. Microsystems, 2020)

Scheduling Periodic Real-Time Tasks with Inter-Task Synchronisation. - Lukás Kohútka (MECO, 2022)

A New FPGA - based Architecture of Task Scheduler with Support of Periodic Real-Time Tasks. - Lukás Kohútka (MIXDES, 2022)

A New RISC-V CPU for Safety-Critical Systems. - Ján Mach; Lukás Kohútka; Pavel Cicák (MECO, 2023)

Hardened Processor Architecture. - Ján Mach; Lukás Kohútka; Pavel Cicák (MIXDES, 2023)

Scheduling Tool for Deterministic Communication in Distributed Real-Time Systems. - Ján Mach; Valeria Tasková; Lukás Kohútka (SQAMIA, 2023)

Interface Protection Against Transient Faults. - Ján Mach; Lukás Kohútka; Pavel Cicák (DDECS, 2024)

Influence of Structural Units on Vulnerability of Systems with Distinct Protection Approaches. - Ján Mach; Lukás Kohútka; Pavel Cicák (DSD, 2024)

Lockstep Vs Microarchitecture: A Comparison. - Ján Mach; Lukás Kohútka; Pavel Cicák (SOCC, 2024)

Lockstep Replacement: Fault-Tolerant Design. - Ján Mach; Lukás Kohútka (IEEE Access, 2025)