Current Sensing Completion Detection in deep sub-micron technologies. - Lukás Nagy; Viera Stopjaková (DDECS, 2010)

Current sensing methodology for completion detection in self-timed systems. - Lukás Nagy; Viera Stopjaková (DDECS, 2011)

Current sensing completion detection in dual-rail asynchronous systems. - Lukás Nagy; Viera Stopjaková (DDECS, 2012)

Completion detection in dual-rail asynchronous systems by current-sensing. - Lukás Nagy; Viera Stopjaková; Roman Záluský (Microelectron. J., 2013)

Novel architecture of a digital neuron for FFNN employing special multiplication. - Roman Záluský; Daniela Duracková; Viera Stopjaková; Lukás Nagy; Vladimír Sedlák (ECAI, 2014)

3-D electrothermal device/circuit simulation of DC-DC converter module in multi-die IC. - Ales Chvála; Daniel Donoval; Lukás Nagy; Juraj Marek; Patrik Pribytny; Marian Molnar (ESSDERC, 2014)

Current Sensing Completion Detection in Single-Rail Asynchronous Systems. - Lukás Nagy; Viera Stopjaková; Juraj Brenkus (Comput. Informatics, 2014)

Design of In AlN/GaN Heterostructure-Based Logic Cells. - Lukás Nagy; Viera Stopjaková; Alexander Satka (DDECS, 2015)

Readout interface for capacitive MEMS microphone in CMOS technology. - Daniel Arbet; Gabriel Nagy; Martin Kovác; Viera Stopjaková; Lukás Nagy (MIXDES, 2015)

Low-voltage bulk-driven variable gain amplifier in 130 nm CMOS technology. - Daniel Arbet; Martin Kovác; Lukás Nagy; Viera Stopjaková; Juraj Brenkus (DDECS, 2016)

Impedance calculation based method for AC fault analysis of mixed-signal circuits. - Juraj Brenkus; Viera Stopjaková; Lukás Nagy; Daniel Arbet (DDECS, 2016)

Variable-gain amplifier for ultra-low voltage applications in 130nm CMOS technology. - Daniel Arbet; Martin Kovác; Lukás Nagy; Viera Stopjaková; Michal Sovcik (MIPRO, 2016)

Low-power bulk-driven rail-to-rail comparator in 130 nm CMOS technology. - Lukás Nagy; Daniel Arbet; Martin Kovác; Viera Stopjaková (AFRICON, 2017)

130 nm CMOS Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications. - Daniel Arbet; Viera Stopjaková; Martin Kovác; Lukás Nagy; Matej Rakus; Michal Sovcik (J. Circuits Syst. Comput., 2017)

A Novel Method Towards Time-Efficient Fault Analysis of Analog and Mixed-Signal Circuits. - Juraj Brenkus; Viera Stopjaková; Viera Cernanová; Daniel Arbet; Lukás Nagy; Vladimír Sedlák (J. Circuits Syst. Comput., 2017)

Two-Stage Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications. - Daniel Arbet; Martin Kovác; Lukás Nagy; Viera Stopjaková; Michal Sovcik (DDECS, 2018)

Design and Performance Analysis of Ultra-Low Voltage Rail-to-Rail Comparator in 130 nm CMOS Technology. - Lukás Nagy; Daniel Arbet; Martin Kovác; Miroslav Potocný; Viera Stopjaková (DDECS, 2018)

A Novel Hardware-Accelerated Priority Queue for Real-Time Systems. - Lukás Kohútka; Lukás Nagy; Viera Stopjaková (DSD, 2018)

Device and circuit models of InAlN/GaN D- and dual-gate E-mode HEMTs for design and characterisation of monolithic NAND logic cell. - Ales Chvála; Lukás Nagy; Juraj Marek; Juraj Priesol; Daniel Donoval; Alexander Satka; Michal Blaho; Dagmar Gregusová; Ján Kuzmík (DTIS, 2018)

Performance Analysis Of Ultra Low-Voltage Rail-to-Rail Comparator In 130 nm CMOS Technology. - Lukás Nagy; Daniel Arbet; Martin Kovác; Miroslav Potocný; Michal Sovcik; Viera Stopjaková (AFRICON, 2019)

Low Latency Hardware-Accelerated Dynamic Memory Manager for Hard Real-Time and Mixed-Criticality Systems. - Lukás Kohútka; Lukás Nagy; Viera Stopjaková (DDECS, 2019)

Investigation of Low-Voltage, Sub-threshold Charge Pump with Parasitics Aware Design Methodology. - Martin Kovác; Daniel Arbet; Viera Stopjaková; Michal Sovcik; Lukás Nagy (DDECS, 2019)

Ultra Low-Voltage Rail-to-Rail Comparator Design in 130 nm CMOS Technology. - Lukás Nagy; Daniel Arbet; Martin Kovác; Miroslav Potocný; Viera Stopjaková (DDECS, 2019)

Neural Network for Circuit Models of Monolithic InAlN/GaN NAND and NOR Logic Gates. - Ales Chvála; Lukás Nagy; Juraj Marek; Juraj Priesol; Daniel Donoval; Alexander Satka (DTIS, 2019)

Towards Energy-autonomous Integrated Systems Through Ultra-low Voltage Analog IC Design. - Viera Stopjaková; Martin Kovác; Daniel Arbet; Lukás Nagy (MIXDES, 2019)

Device and Circuit Models of Monolithic InAlN/GaN NAND and NOR Logic Cells Comprising D- and E-Mode HEMTs. - Ales Chvála; Lukás Nagy; Juraj Marek; Juraj Priesol; Daniel Donoval; Alexander Satka; Michal Blaho; Dagmar Gregusová; Ján Kuzmík (J. Circuits Syst. Comput., 2019)

A Novel On-Chip Task Scheduler for Mixed-Criticality Real-Time Systems. - Lukás Kohútka; Lukás Nagy; Viera Stopjaková (J. Circuits Syst. Comput., 2019)

Dynamic Properties Of Ultra Low-Voltage Rail-to-Rail Comparator Designed In 130 nm CMOS Technology. - Lukás Nagy; Daniel Arbet; Martin Kovác; Miroslav Potocný; Michal Sovcik; Viera Stopjaková (DDECS, 2020)

RED-based Scheduler on Chip for Mixed-Criticality Real-Time Systems. - Lukás Kohútka; Lukás Nagy; Viera Stopjaková (MECO, 2020)

Multi-Topology DC-DC Converter for Low-Voltage Energy Harvesting Systems. - Martin Kovác; Daniel Arbet; Lukás Nagy; Michal Sovcik; Viera Stopjaková (MIPRO, 2020)

Low-Leakage ESD Structures in 130nm CMOS Technology. - Lukás Nagy; Ales Chvála; Viera Stopjaková (RADIOELEKTRONIKA, 2020)

EKV Model for Bulk-Driven Circuit Design Using gmb/ID Method. - Lukás Nagy; Daniel Arbet; Martin Kovác; Miroslav Potocný; Róbert Ondica; Viera Stopjaková (AFRICON, 2021)

EKV MOS Transistor Model For Ultra Low-Voltage Bulk-Driven IC Design. - Lukás Nagy; Daniel Arbet; Martin Kovác; Miroslav Potocný; Michal Sovcik; Viera Stopjaková (DDECS, 2021)

Fully On-Chip Low-Drop Regulator for Low-Power Applications. - Daniel Arbet; Miroslav Potocný; Martin Kovác; Lukás Nagy; Viera Stopjaková (MIPRO, 2021)

Maximum Power Point Tracking Circuit for an Energy Harvester in 130 nm CMOS Technology. - Adam Hudec; Lukás Nagy; Martin Kovác; Viera Stopjaková (CoRR, 2021)

Low-Voltage DC-DC Converter for IoT and On-Chip Energy Harvester Applications. - Miroslav Potocný; Martin Kovác; Daniel Arbet; Michal Sovcik; Lukás Nagy; Viera Stopjaková; Richard Ravasz (Sensors, 2021)

High Power Supply Rejection LDO Regulator for Switching Applications. - Daniel Arbet; Martin Kovác; David Maljas; Lukás Nagy; Viera Stopjaková (MIPRO, 2022)

Low-Power Rail-to-Rail Comparator in 130 nm CMOS Technology. - Lukás Nagy; Daniel Arbet; Martin Kovác; Miroslav Potocný; Michal Sovcik; Viera Stopjaková (RADIOELEKTRONIKA, 2022)

Design of Ultra-Low Power Comparator in 65 NM CMOS Technology with Rail-to-Rail Input Range. - Lukás Nagy; Michal Sovcik; Viera Stopjaková (AFRICON, 2023)

Development of slope detection ASIC for on-chip current sensing in voltage converters. - Richard Ravasz; Viera Stopjaková; David Maljar; Daniel Arbet; Lukás Nagy; Martin Kovác (Integr., 2025)