Evolution of Multifunctional Combinational Modules Controlled by the Power Supply Voltage. - Lukás Sekanina; Lukás Starecek; Zbysek Gajda; Zdenek Kotásek (AHS, 2006)

Novel Logic Circuits Controlled by Vdd: Transistor-Level Simulations of Polymorphic Combinational Modules. - Lukás Sekanina; Lukás Starecek; Zdenek Kotásek (DDECS, 2006)

Reduction of Test Vectors Volume by Means of Gate-Level Reconfiguration. - Lukás Starecek; Lukás Sekanina; Zdenek Kotásek (DDECS, 2008)

Polymorphic Gates in Design and Test of Digital Circuits. - Lukás Sekanina; Lukás Starecek; Zdenek Kotásek; Zbysek Gajda (Int. J. Unconv. Comput., 2008)

Evolutionary Design of Reconfiguration Strategies to Reduce the Test Application Time. - Jirí Simácek; Lukás Sekanina; Lukás Starecek (ICES, 2010)