Fast and Accurate DRAM Simulation: Can we Further Accelerate it? - Johannes Feldmann; Kira Kraft; Lukas Steiner; Norbert Wehn; Matthias Jung 001 (DATE, 2020)

DRAMSys4.0: A Fast and Cycle-Accurate SystemC/TLM-Based DRAM Simulator. - Lukas Steiner; Matthias Jung 001; Felipe S. Prado; Kirill Bykov; Norbert Wehn (SAMOS, 2020)

From Remote-Controlled Excavators to Digitized Construction Sites. - Johannes Schönböck; Werner Kurschl; Mirjam Augstein; Josef Altmann; Johannes Fraundorfer; Lisa-Maria Freller; Lukas Steiner; Cornelius Zysk; Marian Massegg; Stefan Gabauer (ISM, 2021)

Exploration of DDR5 with the Open-Source Simulator DRAMSys. - Lukas Steiner; Matthias Jung 001; Norbert Wehn (MBMV, 2021)

An LPDDR4 Safety Model for Automotive Applications. - Lukas Steiner; Kira Kraft; Denis Uecker; Matthias Jung 001; Michael Huonker; Norbert Wehn (MEMSYS, 2021)

A Novel DRAM Architecture for Improved Bandwidth Utilization and Latency Reduction Using Dual-Page Operation. - Chirag Sudarshan; Lukas Steiner; Matthias Jung 001; Jan Lappas; Christian Weis; Norbert Wehn (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Unveiling the Real Performance of LPDDR5 Memories. - Lukas Steiner; Matthias Jung 001; Michael Huonker; Norbert Wehn (MEMSYS, 2022)

A Framework for Formal Verification of DRAM Controllers. - Lukas Steiner; Chirag Sudarshan; Matthias Jung 001; Dominik Stoffel; Norbert Wehn (MEMSYS, 2022)

A Critical Assessment of DRAM-PIM Architectures - Trends, Challenges and Solutions. - Chirag Sudarshan; Mohammad Hassani Sadi; Lukas Steiner; Christian Weis; Norbert Wehn (SAMOS, 2022)

DRAMSys4.0: An Open-Source Simulation Framework for In-depth DRAM Analyses. - Lukas Steiner; Matthias Jung 001; Felipe S. Prado; Kirill Bykov; Norbert Wehn (Int. J. Parallel Program., 2022)

ZuSE Ki-Avf: Application-Specific AI Processor for Intelligent Sensor Signal Processing in Autonomous Driving. - Gia Bao Thieu; Sven Gesper; Guillermo Payá-Vayá; Christoph Riggers; Oliver Renke; Till Fiedler; Jakob Marten; Tobias Stuckenberg; Holger Blume; Christian Weis; Lukas Steiner; Chirag Sudarshan; et al. (DATE, 2023)

Automatic DRAM Subsystem Configuration with irace. - Lukas Steiner; Gustavo Delazeri; Iron Prando da Silva; Matthias Jung 001; Norbert Wehn (DroneSE/RAPIDO@HiPEAC, 2023)

A Precise Measurement Platform for LPDDR4 Memories. - Johannes Feldmann; Lukas Steiner; Derek Christ; Thomas Psota; Matthias Jung 001; Norbert Wehn (MEMSYS, 2023)

A Mapping of Triangular Block Interleavers to DRAM for Optical Satellite Communication. - Lukas Steiner; Timo Lehnigk-Emden; Markus Fehrenz; Norbert Wehn (DATE, 2024)

The New Costs of Physical Memory Fragmentation. - Alexander Halbuer; Illia Ostapyshyn; Lukas Steiner; Lars Wrenger; Matthias Jung 001; Christian Dietrich 001; Daniel Lohmann (DIMES@SOSP, 2024)

PIMSys: A Virtual Prototype for Processing in Memory. - Derek Christ; Lukas Steiner; Matthias Jung 001; Norbert Wehn (MEMSYS, 2024)

A Novel System Simulation Framework for HBM2 FPGA Platforms. - Hector Gerardo Muñoz Hernandez; Veronia Iskandar; Lukas Steiner; Philipp Holzinger; Matthias Jung 001; Diana Göhringer; Michael Hübner 001; Norbert Wehn; Marc Reichenbach (SAMOS, 2024)

DRAMPower 5: An Open-Source Power Simulator for Current Generation DRAM Standards. - Lukas Steiner; Thomas Psota; Marco Mörz; Derek Christ; Matthias Jung 001; Norbert Wehn (RAPIDO@HiPEAC, 2025)

Split'n'Cover: ISO 26262 Hardware Safety Analysis with SystemC. - Lukas Steiner; Kira Kraft; Derek Christ; Denis Uecker; Christian Malek; Matthias Jung 001; Norbert Wehn (Int. J. Parallel Program., 2025)

Correction: Split'n'Cover: ISO 26,262 Hardware Safety Analysis with SystemC. - Lukas Steiner; Kira Kraft; Derek Christ; Denis Uecker; Christian Malek; Matthias Jung 001; Norbert Wehn (Int. J. Parallel Program., 2025)