A Multi-Gb/s Parallel String Matching Engine for Intrusion Detection Systems. - Vahid Rahmanzadeh; Mohammad Bagher Ghaznavi Ghoushchi (CSICC, 2008)

A new low-power and low-complexity all digital PLL (ADPLL) in 180nm and 32nm. - Arash Abadian; Mojtaba Lotfizad; Nasser Erfani Majd; Mohammad Bagher Ghaznavi Ghoushchi; H. Mirzaie (ICECS, 2010)

Performance improvement of differential static CMOS logic family. - Zohreh Kiaee; M. B. Ghaznavi-Ghoushchi (EUROCON, 2011)

A new low-power, low-area, parallel prefix Sklansky adder with reduced inter-stage connections complexity. - Mahta Moghaddam; M. B. Ghaznavi-Ghoushchi (EUROCON, 2011)

An ultra low power and low complexity all digital PLL with a high resolution digitally controlled oscillator. - Arash Abadian; Mojtaba Lotfizad; M. B. Ghaznavi-Ghoushchi; Nasser Erfani Majd (IEICE Electron. Express, 2011)

An ultra low-power digitally controlled oscillator using novel Schmitt-trigger based hysteresis delay cells. - Nasser Erfani Majd; Mojtaba Lotfizad; M. B. Ghaznavi-Ghoushchi; Arash Abadian (IEICE Electron. Express, 2011)

DotDFS: A Grid-based high-throughput file transfer system. - Alireza Poshtkohi; M. B. Ghaznavi-Ghoushchi (Parallel Comput., 2011)

Low rate DOS traceback based on sum of flows. - M. Hamedi-Hamzehkolaie; M. J. Shamani; M. B. Ghaznavi-Ghoushchi (IST, 2012)

The xDotGrid native, cross-platform, high-performance xDFS file transfer framework. - Alireza Poshtkohi; M. B. Ghaznavi-Ghoushchi (Comput. Electr. Eng., 2012)

An Improved Watchdog Technique Based On Power-Aware Hierarchical Design For Ids In Wireless Sensor Networks - A. Forootaninia; M. B. Ghaznavi-Ghoushchi (CoRR, 2012)

A 2-bit/step SAR ADC structure with one radix-4 DAC. - M. H. M. Larijani; M. B. Ghaznavi-Ghoushchi (IEICE Electron. Express, 2012)

Self-impact of NBTI effect on the degradation rate of threshold voltage in PMOS transistors. - Behzad Eghbalkhah; S. A. K. Gharavi; Ali Afzali-Kusha; M. B. Ghaznavi-Ghoushchi (DTIS, 2013)

Attribute-based collaborative filtering using genetic algorithm and weighted C-means algorithm. - Mojtaba Salehi; Isa Nakhai Kamalabadi; Mohammad Bagher Ghaznavi Ghoushchi (Int. J. Bus. Inf. Syst., 2013)

An Effective Recommendation Framework for Personal Learning Environments Using a Learner Preference Tree and a GA. - Mojtaba Salehi; Isa Nakhai Kamalabadi; Mohammad Bagher Ghaznavi Ghoushchi (IEEE Trans. Learn. Technol., 2013)

A New Low-Power Architecture Design for Distributed Arithmetic Unit in FIR Filter Implementation. - Seyedeh Fatemeh Ghamkhari; Mohammad Bagher Ghaznavi Ghoushchi (Circuits Syst. Signal Process., 2014)

Personalized recommendation of learning material using sequential pattern mining and attribute based collaborative filtering. - Mojtaba Salehi; Isa Nakhai Kamalabadi; Mohammad Bagher Ghaznavi Ghoushchi (Educ. Inf. Technol., 2014)

Design and implementation of a novel secure internet voting protocol using Java Card 3 technology. - Mostafa Mohammadpourfard; Mohammad-Ali Doostari; Mohammad Bagher Ghaznavi Ghoushchi; Hadi Mikaili (Int. J. Bus. Inf. Syst., 2014)

VLSI implementation of star detection and centroid calculation algorithms for star tracking applications. - Mohsen Azizabadi; Alireza Behrad; M. B. Ghaznavi-Ghoushchi (J. Real Time Image Process., 2014)

Workload and temperature dependent evaluation of BTI-induced lifetime degradation in digital circuits. - Behzad Eghbalkhah; Mehdi Kamal; Hassan Afzali-Kusha; Ali Afzali-Kusha; M. B. Ghaznavi-Ghoushchi; Massoud Pedram (Microelectron. Reliab., 2015)

CSAM: A clock skew-aware aging mitigation technique. - Behzad Eghbalkhah; Mehdi Kamal; Ali Afzali-Kusha; Mohammad Bagher Ghaznavi Ghoushchi; Massoud Pedram (Microelectron. Reliab., 2015)

TSSL: improving SSL/TLS protocol by trust model. - Maryam Asadzadeh Kaljahi; Ali Payandeh; Mohammad Bagher Ghaznavi Ghoushchi (Secur. Commun. Networks, 2015)

A new secure Internet voting protocol using Java Card 3 technology and Java information flow concept. - Mostafa Mohammadpourfard; Mohammad-Ali Doostari; Mohammad Bagher Ghaznavi Ghoushchi; Nafiseh Shakiba (Secur. Commun. Networks, 2015)

Two Efficient Dual-Band and Wide-Band Low-Power DCO Designs Using Current Starving Gates, DCV and Reconfigurable Schmitt Triggers in 180 nm. - Masoumeh Souri; Mohammad Bagher Ghaznavi Ghoushchi (Circuits Syst. Signal Process., 2016)

Hardware architecture for projective model calculation and false match refining using random sample consensus algorithm. - Ehsan Azimi; Alireza Behrad; Mohammad Bagher Ghaznavi Ghoushchi; Jamshid Shanbehzadeh (J. Electronic Imaging, 2016)

Memristor based circuit design using charge and attached capacitor. - Aliasghar Bagheri-Soulla; M. B. Ghaznavi-Ghoushchi (Microelectron. J., 2016)

A novel transceiver structure including power and audio amplifiers for Internet of Things applications. - Alireza Ghorbani; M. B. Ghaznavi-Ghoushchi (Comput. Electr. Eng., 2017)

The Parvicursor infrastructure to facilitate the design of Grid and Cloud computing systems. - Alireza Poshtkohi; M. B. Ghaznavi-Ghoushchi; Kamyar Saghafi (Computing, 2017)

An RRAM-based MLC design approach. - Aliasghar Bagheri-Soulla; M. B. Ghaznavi-Ghoushchi (Microelectron. J., 2017)

MTCML: Analysis, design and optimization of an alternative shallow-depth multiple-tail current mode logic. - M. B. Ghaznavi-Ghoushchi; S. A. H. Ejtahed (Microelectron. J., 2017)

A Process-Independent and Highly Linear DCO for Crowded Heterogeneous IoT Devices in 65-nm CMOS. - Javad Gorji; M. B. Ghaznavi-Ghoushchi (IEEE Trans. Very Large Scale Integr. Syst., 2017)

A Novel Fully Differential CMOS Class-E Power Amplifier with Higher Output Power and Efficiency for IoT Application. - Alireza Ghorbani; M. B. Ghaznavi-Ghoushchi (Wirel. Pers. Commun., 2017)

Low-complexity and differential power analysis (DPA)-resistant two-folded power-aware Rivest-Shamir-Adleman (RSA) security schema implementation for IoT-connected devices. - Saman Kaedi; Mohammad-Ali Doostari; Mohammad Bagher Ghaznavi Ghoushchi (IET Comput. Digit. Tech., 2018)

A power-performance tunable logic with adjustable threshold pseudo-dynamic building blocks and CMOS compatibility. - Hanieh Ghaffarishad; Naser MohammadZadeh; Mohammad Bagher Ghaznavi Ghoushchi (Int. J. Circuit Theory Appl., 2018)

An ultra low-power current-mode clock and data recovery design with input bit-rate adaptability for biomedical applications in CMOS 90 nm. - J. Ahmadi-Farsani; Hamed Sadjedi; M. B. Ghaznavi-Ghoushchi (Integr., 2018)

A low-area, 43.5% PAE, 0.9 W, Class-E differential power amplifier in 2.4 GHz for IoT applications. - Alireza Ghorbani; M. B. Ghaznavi-Ghoushchi (Integr., 2018)

NEMR: A Nonequidistant DPA Attack-Proof of Modular Reduction in a CRT Implementation of RSA. - Saman Kaedi; Mohammad-Ali Doostari; M. B. Ghaznavi-Ghoushchi (J. Circuits Syst. Comput., 2018)

A high-precision time-domain RRAM state control approach. - Aliasghar Bagheri-Soulla; M. B. Ghaznavi-Ghoushchi (Microelectron. J., 2018)

An output node split CMOS logic for high-performance and large capacitive-load driving scenarios. - Maliheh Rafiee; M. B. Ghaznavi-Ghoushchi (Microelectron. J., 2018)

A fully pipelined and parallel hardware architecture for real-time BRISK salient point extraction. - Ehsan Azimi; Alireza Behrad; Mohammad Bagher Ghaznavi Ghoushchi; Jamshid Shanbehzadeh (J. Real Time Image Process., 2019)

Design of low-voltage shallow-depth differential source coupled logic using feedback and feedforward techniques. - Maliheh Rafiee; M. B. Ghaznavi-Ghoushchi (Microelectron. J., 2019)

A low-power and high-speed parallel binary comparator based on inter-stage modified binary tree structure and power-delay improved cell elements. - M. Rahimi; M. B. Ghaznavi-Ghoushchi (Microelectron. J., 2019)

A DPA Attack on IOA Data-Dependent Delay Countermeasure Based on an Inherent Tempo-Spatial Data Dependency. - Saman Kaedi; Mohammad-Ali Doostari; M. B. Ghaznavi-Ghoushchi (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

PSML: parallel system modeling and simulation language for electronic system level. - Alireza Poshtkohi; M. B. Ghaznavi-Ghoushchi; Kamyar Saghafi (J. Supercomput., 2019)

Optimistic Modeling and Simulation of Complex Hardware Platforms and Embedded Systems on Many-Core HPC Clusters. - Alireza Poshtkohi; M. B. Ghaznavi-Ghoushchi; Kamyar Saghafi (IEEE Trans. Parallel Distributed Syst., 2019)

A Low-Power CMOS Transceiver in 130 nm for Wireless Sensor Network Applications. - A. R. Behrouj; Alireza Ghorbani; M. B. Ghaznavi-Ghoushchi; Mohsen Jalali (Wirel. Pers. Commun., 2019)

An energy-efficient threshold voltage extractor with the burst-mode operation and extended long-term variations using FVF. - A. R. Kariman; M. B. Ghaznavi-Ghoushchi; A. R. Shamshiri (Microelectron. J., 2020)

PDP and TPD Flexible MCML and MTCML Ultralow-Power and High-Speed Structures for Wireless and Wireline Applications. - Mahdi Yektaei; M. B. Ghaznavi-Ghoushchi (IEEE Trans. Very Large Scale Integr. Syst., 2020)

An Ultra-Low Power Programmable Current Gain Amplifier with a Novel Current Gain Controller Structure for IoT Applications. - Alireza Ghorbani; M. B. Ghaznavi-Ghoushchi (Wirel. Pers. Commun., 2020)

A New Low Power Schema for Stream Processors Front-End with Power-Aware DA-Based FIR Filters by Investigation of Image Transitions Sparsity. - Seyedeh Fatemeh Ghamkhari; Mohammad Bagher Ghaznavi Ghoushchi (Circuits Syst. Signal Process., 2021)

Low-voltage and high-speed stand-alone multiple-input complex gates for error correction coding applications. - Maliheh Rafiee; Mohammad Bagher Ghaznavi Ghoushchi (Int. J. Circuit Theory Appl., 2021)

A New Side-Channel Attack on Reduction of RSA-CRT Montgomery Method Based. - Saman Kaedi; Mohammad-Ali Doostari; M. B. Ghaznavi-Ghoushchi; H. Yusefi (J. Circuits Syst. Comput., 2021)

A fanout-improved Parallel Prefix Adder with full-swing PTL cells and Graded Bit Efficiency. - M. Rahimi; M. B. Ghaznavi-Ghoushchi (Microelectron. J., 2021)

AI Annotated Recommendations in an Efficient Visual Learning Environment with Emphasis on YouTube (AI-EVL). - Faeze Gholamrezaie; Melika Bahman-Abadi; M. B. Ghaznavi-Ghoushchi (CoRR, 2022)

A power-performance partitioning approach for low-power DA-based FIR filter design with emphasis on datapath and controller. - Seyedeh Fatemeh Ghamkhari; Mohammad Bagher Ghaznavi Ghoushchi (Int. J. Circuit Theory Appl., 2022)

A novel generic modulo-2 graph with full set taxonomical conversion to parallel prefix adders. - M. Rahimi; M. B. Ghaznavi-Ghoushchi (Int. J. Circuit Theory Appl., 2022)

ML-Based Aging Monitoring and Lifetime Prediction of IoT Devices With Cost-Effective Embedded Tags for Edge and Cloud Operability. - Ali Reza Shamshiri; M. B. Ghaznavi-Ghoushchi; Ali Reza Kariman (IEEE Internet Things J., 2022)

AMPS: An Automated Mesochronous Pipeline Scheduler and Design Space Explorer for High Performance Digital Circuits. - Fateme Sadat Ayatollahi; M. B. Ghaznavi-Ghoushchi; Naser Mohammadzadeh; Seyedeh Fatemeh Ghamkhari (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Analysis and Extraction of Tempo-Spatial Events in an Efficient Archival CDN with Emphasis on Telegram. - Melika Bahman-Abadi; M. B. Ghaznavi-Ghoushchi (CoRR, 2023)

Design and Analysis of an Ultralow-Voltage Complementary Fold-Interleaved Multiple-Tail Current Mode Logic. - R. Malmir; M. B. Ghaznavi-Ghoushchi (IEEE Trans. Very Large Scale Integr. Syst., 2023)

QD-PFD: Quasi Dynamic Dead-Zone/Blind-Zone Free PFD With 23 nW-38 μW for 2 MHz-5 GHz Range and 150-ns Settling Time PLL Applications. - A. Ghaemnia; M. B. Ghaznavi-Ghoushchi (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

An Unconditional Evenly Spaced STRO With a New Mitigated Drafting Effect Muller C-Element. - M. Vafaieenezhad; M. B. Ghaznavi-Ghoushchi (IEEE Trans. Very Large Scale Integr. Syst., 2024)

Utilizing signal flow graph on multiple feedback amplifiers of NMC and DACFC with emphasis on design space exploration and conversion. - Masume Ghashghai; Mohammad Bagher Ghaznavi Ghoushchi (Int. J. Circuit Theory Appl., 2024)

Design and Analysis of a New Three-Stage Feedback Amplifier Utilizing Signal Flow Graph Domain Inspection Approach. - M. Ghashghai; M. B. Ghaznavi-Ghoushchi (IEEE Trans. Very Large Scale Integr. Syst., 2024)