Simulation Bounds for Equivalence Verification of Arithmetic Datapaths with Finite Word-Length Operands. - Namrata Shekhar; Priyank Kalla; M. Brandon Meredith; Florian Enescu (FMCAD, 2006)

Finding linear building-blocks for RTL synthesis of polynomial datapaths with fixed-size bit-vectors. - Sivaram Gopalakrishnan; Priyank Kalla; M. Brandon Meredith; Florian Enescu (ICCAD, 2007)

Simulation Bounds for Equivalence Verification of Polynomial Datapaths Using Finite Ring Algebra. - Namrata Shekhar; Priyank Kalla; M. Brandon Meredith; Florian Enescu (IEEE Trans. Very Large Scale Integr. Syst., 2008)