Systolic architecture for the VLSI implementation of high-speed staged decoders/quantizers. - Giuseppe Caire; Javier Ventura-Traveset; M. Hollreiser; Ezio Biglieri (J. VLSI Signal Process., 1995)

Self-timed MESFET gallium arsenide circuit techniques for a direct digital frequency synthesiser. - Stefan Lachowicz; Kamran Eshraghian; M. Hollreiser; Hans-Jörg Pfleiderer (ISSPA, 1999)

Highly efficient wideband digital frequency demultiplexer. - M. Hollreiser; Christian Rosadini; D. Lo Iacono; Luca Fanucci (ICECS, 2002)