Multi-modal Authentication Using Continuous Dynamic Programming. - K. R. Radhika 001; S. V. Sheela; M. K. Venkatesha; G. N. Sekhar (COST 2101/2102 Conference, 2009)

A Low-Power Low-Voltage CMOS Thyristor Based Delay Element. - P. V. Manjunath; H. R. Baghyalakshmi; M. K. Venkatesha (ICETET, 2009)

Optimized reversible BCD adder using new reversible logic gates - H. R. Bhagyalakshmi; M. K. Venkatesha (CoRR, 2010)

Signature and Iris Authentication Based on Derived Kinematic Values. - K. R. Radhika 001; S. V. Sheela; M. K. Venkatesha; G. N. Sekhar (Int. J. Pattern Recognit. Artif. Intell., 2010)

Signature authentication based on subpattern analysis. - K. R. Radhika 001; M. K. Venkatesha; G. N. Sekhar (Appl. Soft Comput., 2011)

A Novel Approach for Authentication of Online Handwritten Signature Based on residuals, poles and zeros. - K. R. Radhika 001; M. K. Venkatesha; G. N. Sekhar (Int. J. Pattern Recognit. Artif. Intell., 2011)

An approach for on-line signature authentication using Zernike moments. - K. R. Radhika 001; M. K. Venkatesha; G. N. Sekhar (Pattern Recognit. Lett., 2011)

Revisiting feature level and score level fusion techniques in multimodal biometrics system. - M. J. Sudhamani; M. K. Venkatesha; K. R. Radhika 001 (ICMCS, 2012)

Design of Parity Preserving Logic Based Fault Tolerant Reversible Arithmetic Logic Unit. - Rakshith Saligram; Shrihari Shridhar Hegde; Shashidhar A. Kulkarni; H. R. Bhagyalakshmi; M. K. Venkatesha (CoRR, 2013)