CVT-FERT : Automatic Generator of Analytical Faults at Register Transfer Level from Electrical and Topological Descriptions. - M. Melgara; M. Paolini; Roberto Roncella; S. Morpurgo (ITC, 1984)

A Multi-Level Test Pattern Generation and Validation Environment. - Ioannis Stamelos; M. Melgara; M. Paolini; S. Morpurgo; C. Segre (ITC, 1986)

Automatic Location of IC Design Errors Using Beam System. - M. Melgara; M. Battu; P. Garino; J. Dowe; Y. J. Vernay; M. Marzouki; Francis M. Boland (ITC, 1988)