Improved Turn-on Uniformity & Failure Current Density by n-& p-Tap Engineering in Fin Based SCRs. - M. Monishmurali; Milova Paul; Mayank Shrivastava (IRPS, 2020)

Peculiar Current Instabilities & Failure Mechanism in Vertically Stacked Nanosheet ggN-FET. - M. Monishmurali; Mayank Shrivastava (IRPS, 2021)

A Novel High Voltage Drain Extended FinFET SCR for SoC Applications. - M. Monishmurali; Mayank Shrivastava (IRPS, 2021)

Effect of Source & Drain Side Abutting on the Low Current Filamentation in LDMOS-SCR Devices. - M. Monishmurali; Nagothu Karmel Kranthi; Gianluca Boselli; Mayank Shrivastava (IRPS, 2022)

Multi-finger turn-on: A potential cause of premature failure in Drain Extended HV Nanosheet Devices. - Jatin; M. Monishmurali; Mayank Shrivastava (IRPS, 2023)

Extremely Large Breakdown to Snapback Voltage Offset $( mathrm{V}_{ mathrm{t}1} > > mathrm{V}_{ text{BD}})$: Another Way to Improve ESD Resilience of LDMOS Devices. - Aakanksha Mishra; Boeila Sampath Kumar; M. Monishmurali; Shaik Ahamed Suzaad; Shubham Kumar; Kiran Pote Sanjay; Amit Kumar Singh; Ankur Gupta; Mayank Shrivastava (IRPS, 2023)

Impact of Thin-oxide Gate on the On-Resistance of HV-PNP Under ESD Stress. - M. Monishmurali; Nagothu Karmel Kranthi; Gianluca Boselli; Mayank Shrivastava (IRPS, 2023)