Power factor correction of the enhanced SEPIC converter using a new control methodology. - M. Sivakumari; M. Karthika; M. Renuga (Int. J. Manuf. Technol. Manag., 2020)

Design and Simulation of a Novel 16T SRAM Cell for Low Power Memory Architecture. - P. Nagarajan; M. Renuga; A. Manikandan; S. Dhanasekaran (J. Circuits Syst. Comput., 2024)