Methodology for Active Junction Profile Extraction in thin film FD-SOI Enabling performance driver identification in 500°C devices for 3D sequential integration. - Tadeu Mota Frutuoso; Xavier Garros; Perrine Batude; Laurent Brunet; Joris Lacord; Benoit Sklénard; V. Lapras; Claire Fenouillet-Béranger; M. Ribotta; A. Magalhaes-Lucas; J. Kanyandekwe; R. Kies; et al. (VLSI Technology and Circuits, 2022)

Breakthrough Processes for Si CMOS Devices with BEOL Compatibility for 3D Sequential Integrated more than Moore Analog Applications. - Daphnée Bosch; Abygaël Viey; Tadeu Mota Frutuoso; P. Lheritier; C. Licitra; Nada Zerhouni; A. Albouy; Laurent Brunet; A. Magalhaes-Lucas; L. M. B. da Silva; H. Boutry; M. Husien Fahmy Taha Abdelrahman; et al. (VLSI Technology and Circuits, 2024)