M. S. Bhat
Orcid: 0000-0002-6162-7187Affiliations:
- National Institute of Technology Karnataka, Surathkal, India
- Indian Institute of Science, Bangalore, India (PhD 2007)
According to our database1,
M. S. Bhat
authored at least 30 papers
between 2005 and 2023.
Collaborative distances:
Collaborative distances:
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Bibliography
2023
CCD Sensor Based Cameras for Sustainable Streaming IoT Applications With Compressed Sensing.
IEEE Access, 2023
2021
A fully differential switched-capacitor integrator based programmable resolution hybrid ADC architecture for biomedical applications.
IET Circuits Devices Syst., 2021
2020
Int. J. Circuit Theory Appl., 2020
A Switched Capacitor-Based SAR ADC Employing a Passive Reference Charge Sharing and Charge Accumulation Technique.
Circuits Syst. Signal Process., 2020
2019
Microelectron. J., 2019
Proceedings of the 9th International Symposium on Embedded Computing and System Design, 2019
2018
Fabrication and characterisation of RF MEMS capacitive switches tuned for X and Ku bands.
Int. J. Mechatronics Autom., 2018
11.39 fJ/conversion-step 780 kS/s 8 bit switched capacitor-based area and energy-efficient successive approximation register ADC in 90 nm complementary metal-oxide-semiconductor.
IET Circuits Devices Syst., 2018
14.5 fJ/conversion-step 9-bit 100-kS/s non-binary weighted dual capacitor array based area and energy efficient SAR ADC in 90 nm CMOS.
IET Circuits Devices Syst., 2018
Proceedings of the 8th International Symposium on Embedded Computing and System Design, 2018
2017
Triple Reduced Surface Field Drain Extended MOS Device Design and Its RF Performance Evaluation for Sub-Micron RF SoC Platform.
J. Low Power Electron., 2017
Design of high performance dual-gate nano-scale In0.55Ga0.45 as transistor with modified substrate geometry.
Proceedings of the 8th IEEE Annual Ubiquitous Computing, 2017
2016
Proceedings of the 20th International Symposium on VLSI Design and Test, 2016
Analysis of implant parameters in high voltage TRIPLE RESURF LDMOS for advanced SoC applications.
Proceedings of the Sixth International Symposium on Embedded Computing and System Design, 2016
2015
Low Energy and Area Efficient Nonbinary Capacitor Array Based Successive Approximation Register Analog-to-Digital Converter.
J. Low Power Electron., 2015
2014
Despeckling low SNR, low contrast ultrasound images via anisotropic level set diffusion.
Multidimens. Syst. Signal Process., 2014
Proceedings of the Eleventh International Conference on Wireless and Optical Communications Networks, 2014
Proceedings of the 2014 Fifth International Symposium on Electronic System Design, 2014
Proceedings of the 2014 Fifth International Symposium on Electronic System Design, 2014
A Low Voltage Inverter Based Differential Amplifier for Low Power Switched Capacitor Applications.
Proceedings of the 2014 Fifth International Symposium on Electronic System Design, 2014
Proceedings of the 2014 Fifth International Symposium on Electronic System Design, 2014
2013
Proceedings of the IEEE International Conference on Control Applications, 2013
2012
Minimization of Via-Induced Signal Reflection in On-Chip High Speed Interconnect Lines.
Circuits Syst. Signal Process., 2012
2009
Int. J. Inf. Commun. Technol., 2009
2006
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006
2005
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
An Extrinsic Method of Evolutionary Synthesis of Multiple-Valued Arithmetic Functions using Genetic Algorithms.
Proceedings of the 2nd Indian International Conference on Artificial Intelligence, 2005
An Extrinsic Method for the Synthesis of Analog Functions using Non-Linear Current-Mode Circuits.
Proceedings of the 2nd Indian International Conference on Artificial Intelligence, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005