Timing in-situ monitors: Implementation strategy and applications results. - Ahmed Benhassain; Florian Cacho; Vincent Huard; M. Saliva; Lorena Anghel; C. R. Parthasarathy; Abhishek Jain 003; Fabien Giner (CICC, 2015)

Digital circuits reliability with in-situ monitors in 28nm fully depleted SOI. - M. Saliva; Florian Cacho; Vincent Huard; X. Federspiel; D. Angot; Ahmed Benhassain; Alain Bravaix; Lorena Anghel (DATE, 2015)

Impact of gate oxide breakdown in logic gates from 28nm FDSOI CMOS technology. - M. Saliva; Florian Cacho; Cheikh Ndiaye; Vincent Huard; D. Angot; Alain Bravaix; Lorena Anghel (IRPS, 2015)

Hot-carrier and BTI damage distinction for high performance digital application in 28nm FDSOI and 28nm LP CMOS nodes. - Alain Bravaix; M. Saliva; Florian Cacho; X. Federspiel; Cheikh Ndiaye; Souhir Mhira; Edith Kussener; E. Pauly; Vincent Huard (IOLTS, 2016)

Integrated Test Structures for Reliability Investigation under Dynamic Stimuli. - Florian Cacho; D. Nouguier; M. Arabi; X. Federspiel; Y. Carminati; M. Saliva (IOLTS, 2018)