A 1.6Tb/s Chiplet over XSR-MCM Channels using 113Gb/s PAM-4 Transceiver with Dynamic Receiver-Driven Adaptation of TX-FFE and Programmable Roaming Taps in 5nm CMOS. - Gautam Reddy Gangasani; D. Hanson; Daniel W. Storaska; H. H. Xu; M. Kelly; M. Shannon; Michael Sorna; Michael Wielgos; P. B. Ramakrishna; S. Shi; S. Parker; U. K. Shukla; et al. (ISSCC, 2022)

A 1.1pJ/b/Lane, 1.8Tb/s Chiplet Over XSR-MCM Channels Using 113Gb/s PAM-4 Transceiver with Signal Equalization and Envelope Adaptation Using TX-FFE in 5nm CMOS. - Gautam R. Gangasani; A. Mostafa; A. Singh; Daniel W. Storaska; D. Prabakaran; K. Mohammad; Matthew Baecher; M. Shannon; Michael Sorna; Michael Wielgos; P. Jenkins; P. B. Ramakrishna; et al. (VLSI Technology and Circuits, 2024)

7.2: A 2.2pJ/b 212.5Gb/s PAM-4 Transceiver with >46dB Reach in 5nm FinFET. - Ahmed Mostafa; A. Hassan; A. Hsu; A. K. Singh; C.-H. Wu; C.-R. Yang; D. Prabakaran; Daniel W. Storaska; D. Zhou; Davide Visani; Edmund Hsiao; F. Chu; et al. (ISSCC, 2025)