Exploring Innovative IGZO-channel based DRAM Cell Architectures and Key Technologies for Sub-10nm Node. - Daewon Ha; Y. Lee; Shinjae Yoo; W. Lee; M. H. Cho; K. Yoo; S. M. Lee; S. Lee; M. Terai; T. H. Lee; J. H. Bae; K. J. Moon; et al. (IMW, 2024)

A Novel Method for Extracting Asymmetric Source and Drain Resistance in IGZO Vertical Channel Transistors. - S. W. Yoo; Y. Lee; W. J. Jung; H. Kim; S. Byeon; M. Kim; J. Lee; T. Lee; M. J. Hong; Y. G. Song; S. Lee; M. Terai; et al. (VLSI Technology and Circuits, 2024)