A Systolic Algorithm and Architecture for Galois Field Arithmetic. - Mario Kovac; N. Ranganathan; M. Varanasi (IPPS, 1992)

SIGMA: A VLSI Chip for Galois Field GF(2m) Based Multiplication and Division. - Mario Kovac; N. Ranganathan; M. Varanasi (VLSI Design, 1993)

SIGMA: a VLSI systolic array implementation of a Galois field GF(2 m) based multiplication and division algorithm. - Mario Kovac; N. Ranganathan; M. Varanasi (IEEE Trans. Very Large Scale Integr. Syst., 1993)