Systolic VLSI compiler (SVC) for high performance vector quantisation chips. - Y. Hu; John V. McCanny; M. Yan (ASAP, 1990)

VLSI architectures for digital image coding. - M. Yan; John V. McCanny; Yi Hu (ICASSP, 1990)

A bit-level systolic architecture for implementing a VQ tree search. - M. Yan; John V. McCanny (J. VLSI Signal Process., 1990)

Systolic inner product arrays with automatic word rounding. - M. Yan; John V. McCanny (J. VLSI Signal Process., 1992)

Automated design of DSP array processor chips. - John V. McCanny; Yi Hu; M. Yan (ASAP, 1994)

An Object-Centered Application Development System. - Mohammad A. Ketabchi; Surapol Dasananda; Rani Mikkilineni; Xiangyang Li; F. Xu; M. Yan (DEXA, 1994)

VLSI architectures for vector quantization. - M. Yan; John V. McCanny; Yi Hu (J. VLSI Signal Process., 1995)

A new fourier transform approach for protein coding measure based on the format of the Z curve. - M. Yan; Z. S. Lin; C. T. Zhang (Bioinform., 1998)