Distributed Microarchitectural Protocols in the TRIPS Prototype Processor. - Karthikeyan Sankaralingam; Ramadass Nagarajan; Robert G. McDonald; Rajagopalan Desikan; Saurabh Drolia; M. S. Govindan; Paul Gratz; Divya Gulati; Heather Hanson; Changkyu Kim; Haiming Liu 001; Nitya Ranganathan; et al. (MICRO, 2006)

Composable Lightweight Processors. - Changkyu Kim; Simha Sethumadhavan; M. S. Govindan; Nitya Ranganathan; Divya Gulati; Doug Burger; Stephen W. Keckler (MICRO, 2007)

End-to-end validation of architectural power models. - Madhu Saravana Sibi Govindan; Stephen W. Keckler; Doug Burger (ISLPED, 2009)

Exploiting criticality to reduce bottlenecks in distributed uniprocessors. - Behnam Robatmili; Madhu Saravana Sibi Govindan; Doug Burger; Stephen W. Keckler (HPCA, 2011)

AUDIT: Stress Testing the Automatic Way. - Youngtaek Kim; Lizy Kurian John; Sanjay Pant; Srilatha Manne; Michael J. Schulte; William Lloyd Bircher; Madhu Saravana Sibi Govindan (MICRO, 2012)

How to implement effective prediction and forwarding for fusable dynamic multicore architectures. - Behnam Robatmili; Dong Li; Hadi Esmaeilzadeh; Madhu Saravana Sibi Govindan; Aaron Smith; Andrew Putnam; Doug Burger; Stephen W. Keckler (HPCA, 2013)

Automating Stressmark Generation for Testing Processor Voltage Fluctuations. - Youngtaek Kim; Lizy Kurian John; Sanjay Pant; Srilatha Manne; Michael J. Schulte; William Lloyd Bircher; Madhu Saravana Sibi Govindan (IEEE Micro, 2013)

Scaling Power and Performance viaProcessor Composability. - Madhu Saravana Sibi Govindan; Behnam Robatmili; Dong Li; Bertrand A. Maher; Aaron Smith; Stephen W. Keckler; Doug Burger (IEEE Trans. Computers, 2014)