A Novel Synthesis Strategy Driven by Partial Evaluation Based Circuit Reduction for Application Specific DSP Circuits. - Madhubanti Mukherjee; Ranga Vemuri (ICCD, 2003)

A Fast Macro Based Compilation Methodology for Partially Reconfigurable FPGA Designs. - Manish Handa; Rajesh Radhakrishnan; Madhubanti Mukherjee; Ranga Vemuri (VLSI Design, 2003)

Simultaneous Scheduling, Binding and Layer Assignment for Synthesis of Vertically Integrated 3D Systems. - Madhubanti Mukherjee; Ranga Vemuri (ICCD, 2004)

On Physical-Aware Synthesis of Vertically Integrated 3D Systems. - Madhubanti Mukherjee; Ranga Vemuri (VLSI Design, 2005)

Precision medicine and FPGA technology: Challenges and opportunities. - Brian Hill; Jaclyn Smith; Gans Srinivasa; Kemal Sönmez; Ashish Sirasao; Amit Gupta; Madhubanti Mukherjee (MWSCAS, 2017)