Clock gating for power optimization in ASIC design cycle theory & practice. - Sukumar Jairam; Madhusudan Rao; Jithendra Srinivas; Parimala Vishwanath; H. Udayakumar; Jagdish C. Rao (ISLPED, 2008)

Clock gating effectiveness metrics: Applications to power optimization. - Jithendra Srinivas; Madhusudan Rao; Sukumar Jairam; H. Udayakumar; Jagdish C. Rao (ISQED, 2009)

Optimisation Quality Assessment in Large, Complex SoC Designs Challenges and Solutions. - R. Venkatraman; Shrikrishna Pundoor; Arun Koithyar; Madhusudan Rao; Jagdish C. Rao (VLSI Design, 2009)

Transforming Learning and IT Management through Gamification - Edmond C. Prakash; Madhusudan Rao (Springer, 2015)