A bit-interleaved SRAM with switching power rails write-assist and decoupled read for power-efficient systems. - G. Ramesh; T. Venkatakrishnamoorthy; Madhusudhana Reddy Barusu; M. K. Linga Murthy; Shaik Javid Basha; Y. Mallikarjuna Rao (Integr., 2026)