Application Specific Coarse-Grained FPGA for Processing Element in Real-Time Parallel Particle Filters. - Magesh Sadasivam; Sangjin Hong (IWSOC, 2003)

Dynamically reconfigurable architecture for high-throughput processing of data centric applications. - Magesh Sadasivam; Sangjin Hong (FPGA, 2004)

Glitching power reduction through supply voltage adaptation mechanism for low power array structure design. - Sangjin Hong; Shu-Shin Chin; Magesh Sadasivam (ISCAS (2), 2004)

Autonomous Buffer Controller Design for Concurrent Execution in Block Level Pipelined Dataflow. - Magesh Sadasivam; Sangjin Hong (ISVLSI, 2004)