High-level power estimation and the area complexity of Boolean functions. - Mahadevamurty Nemani; Farid N. Najm (ISLPED, 1996)

Towards a high-level power estimation capability [digital ICs]. - Mahadevamurty Nemani; Farid N. Najm (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996)

Delay Estimation VLSI Circuits from a High-Level View. - Mahadevamurty Nemani; Farid N. Najm (DAC, 1998)

High-Level Power Estimation - Mahadevamurty Nemani (1998)

High-level area and power estimation for VLSI circuits. - Mahadevamurty Nemani; Farid N. Najm (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

Macro-driven circuit design methodology for high-performance datapaths. - Mahadevamurty Nemani; Vivek Tiwari (DAC, 2000)