Energy-Aware Thread Scheduling for Embedded Multi-threaded Processors: Architectural Level Design and Implementation. - Mahanama Wickramasinghe; Hui Guo 001 (ISVLSI, 2014)

Effective hardware-level thread synchronization for high performance and power efficiency in application specific multi-threaded embedded processors. - Mahanama Wickramasinghe; Hui Guo 001 (ICCD, 2015)

Data-Space Relocation to Improve Data Cache Performance for Embedded Multi-threaded Processor Systems. - Mahanama Wickramasinghe; Hui Guo 001 (ICNCC, 2016)

Thread level parallel processing for high performance and energy efficiency in application specific embedded systems. - Mahanama Wickramasinghe (2016)

RV32IMF Five-Stage Pipeline Implementation with Interrupt and Random Number Generation Units. - Dinindu Thilakarathna; Heshan Dissanayake; Buddhi Perera; Roshan G. Ragel; Isuru Dasanayake; Mahanama Wickramasinghe; Isuru Nawinne (ICIIS, 2023)